參數(shù)資料
型號: MC68HC05BS8FB
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.2 MHz, MICROCONTROLLER, PQFP44
封裝: QFP-44
文件頁數(shù): 16/128頁
文件大小: 752K
代理商: MC68HC05BS8FB
MOTOROLA
13-2
MC68HC05BS8
ELECTRICAL SPECIFICATIONS
13
13.3
DC Electrical Characteristics
Table 13-1 DC Electrical Characteristics for MC68HC05BS8
(VDD=5.0Vdc ±10%, VSS=0Vdc, temperature range=0 to 70°C)
CHARACTERISTICS
SYMBOL
MINIMUM
TYPICAL
MAXIMUM
UNIT
Output voltage
ILOAD = –10A
ILOAD = +10A
VOH
VOL
VDD–0.1
0.1
V
Output high voltage (ILOAD=–8mA)
PA0-PA7, PB0-PB1, PC0-PC7, TCMP
(TTL level) VTTL, HTTL, SAM
VOH
VDD–0.8
2.4
V
Output low voltage (ILOAD=+16mA)
PA0-PA7, PC0-PC7, VTTL, HTTL, SAM,
TCMP, SCL, SDL
(ILOAD=+10mA) PB0-PB7
VOL
0.4
V
Input high voltage
PA0-PA7, PB0-PB7, PC0-PC7, TCAP,
SCL, SDA, IRQ, RESET, OSC1
(TTL level) VSYNC, HSYNC, CSYNC
VIH
0.7xVDD
2.0
VDD
V
Input low voltage
PA0-PA7, PB0-PB5, PC0-PC7, TCAP,
SCL, SDA, IRQ, RESET, OSC1
(TTL level) VSYNC, HSYNC, CSYNC
VIL
VSS
0.2xVDD
0.8
V
Supply current:
Run
Wait
Stop
25
°C
0
°C to 70°C (Standard)
IDD
2.5
1.3
1.6
5.0
5.8
2.0
30
50
mA
A
I/O ports high-Z leakage current
PA0-PA7, PB0-PB5, PC0-PC7, SDA, SCL,
GPWM, RSA, RSB
IIL
——
±10
A
Input current
IRQ, RESET, OSC1, VSYNC, HSYNC,
TCAP
IIN
——
1
A
Capacitance
ports (as input or output), RESET, IRQ,
OSC1, OSC2, TCAP
SDA, SCL, HSYNC, VSYNC, CSYNC
COUT
CIN
12
8
pF
Low voltage reset threshold voltage
VLVR
2.6
2.8
3.0
V
Notes:
(1) All values shown reect average measurements.
(2) Typical values at midpoint of voltage range, 25
°C only.
(3) Wait IDD: only timer system active.
(4) Run (operating) IDD, Wait IDD: measured using external square wave clock source to OSC1 (fOSC=4.0MHz),
all inputs 0.2 Vdc from rail; no dc loads, less than 50pF on all outputs, CL=20pF on OSC2.
(5) Wait, Stop IDD: all ports congured as inputs, VIL=0.2 Vdc, VIH=VDD – 0.2 Vdc.
(6) Stop IDD: measured with OSC1 = VSS.
(7) Wait IDD is affected linearly by the OSC2 capacitance.
(8) IRQ should be pulled high at all times.
TPG
110
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