參數(shù)資料
型號: MC68HC05BS8FB
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.2 MHz, MICROCONTROLLER, PQFP44
封裝: QFP-44
文件頁數(shù): 47/128頁
文件大?。?/td> 752K
代理商: MC68HC05BS8FB
MC68HC05BS8
MOTOROLA
3-3
INPUT/OUTPUT PORTS
3
The interrupt signal is latched, and it should be cleared by writing a “1” to the KBIC bit in the KBI
register (bit 6 of $001E) in the interrupt service routine. This should be cleared after the key is
debounced, otherwise unwanted keyboard interrupt signals may be generated.
The keyboard interrupt is negative-edge sensitive only, and the interrupt service routine is
specied by the contents of the memory locations $3FF0 and $3FF1.
KBIC - Keyboard Interrupt Clear
1 (set)
Clear keyboard interrupt latch.
KBE5:0 - Keyboard Interrupt Enable 5:0
1 (set)
Enable keyboard interrupt for the corresponding bit.
0 (clear) –
Disable keyboard interrupt for the corresponding bit.
3.5
PC6 and PC7 - Software Supported M-Bus SDA and SCL
PC6 and PC7 are used for SDA and SDL respectively when congured for the software supported
M-Bus interface. This M-Bus interface is operated by software emulation, with hardware interrupt
circuit connected to PC6 and PC7.
Address
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
KBI Register
$001E
KBIC
KBE5
KBE4
KBE3
KBE2
KBE1
KBE0 0000 0000
TPG
23
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