- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98007 > M44C510D-XXX-DOW (TEMIC SEMICONDUCTORS) 4-BIT, MROM, MICROCONTROLLER PDF資料下載
參數(shù)資料
| 型號： | M44C510D-XXX-DOW |
| 廠商： | TEMIC SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, MICROCONTROLLER |
| 封裝： | SSOP-44 |
| 文件頁數(shù)： | 8/60頁 |
| 文件大?。?/td> | 709K |
| 代理商： | M44C510D-XXX-DOW |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁當前第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁
M44C510E
Rev. A1, 04-May-00
Preliminary Information
16 (60)
System Configuration Register (SC)
Primary register address: ’E’hex
Bit 3
Bit 2
Bit 1
Bit 0
SC: write
RC1
RC0
OS1
OS0
Reset value: 1111b
RC1, RC0
Internal RC oscillator 1 frequency select (SYSCLmax)
RC1
RC0
SYSCLmax @ 25
°C, VDD = 5 V
Note
0
0
7.0 MHz (fiRC0)
0
1
3.0 MHz (fiRC1)
1
0
2.0 MHz (fiRC2)
1
1
0.8 MHz (fiRC3)
Reset value
OS1, OS0
Oscillator selection bits (in conjunction with the CCS-bit)
CCS
OS1
OS0
SUBCL
System Oscillator Selection
0
1
1
External input clock at SCLIN
0
0
1
SYSCLmax/64
RC-oscillator 2 with Rext
0
1
0
4-MHz crystal oscillator
0
0
0
32 kHz
32-kHz crystal oscillator
1
x
x
SYSCLmax/64 or 32 kHz
RC-oscillator 1
If CCS = 0 in the CM-register, the RC-oscillator 1 is stopped.
1.5.4
Power-down Modes
The M44C510E encorporates several modes which en-
able the power consumption to be tailored to a minimum
without sacrificing computational power. When the con-
troller exits the lowest priority interrupt task, it reverts to
a SLEEP state. This is a CPU shutdown condition which
is used to reduce average system power consumption
where the CPU itself is only partially utilized. In SLEEP,
the CPU clocking system is deactivated whereby the pe-
ripherals and associated clock sources may remain active
(Standby Mode) or they can also be halted (Halt Mode).
In Standby Mode, the peripherals are able to continue op-
eration and if required also generate interrupts which can,
along with a reset reactivate the CPU to bring it out of the
sleep state.
SLEEP can only be maintained when none of the interrupt
pending or active register bits are set. The application of
the $AUTOSLEEP routine ensures the correct function of
the sleep mode.
In both Standby and Active modes the current consump-
tion is largely dependent on the frequency of the CPU
system clock (SYSCL) and the supply voltage (VDD).
(see figures 48 and 49) while the Halt Mode current is
merely controller static leakage current.
Selection of Standby or Halt mode is performed by the
NSTOP bit in the clock managent register (CM). It should
be noted that the low power 32-kHz crystal oscillator, if
enabled will always remain active in both Standby and
Halt modes.
Table 6. Power-down modes
Mode
CPU Core
State
NSTOP
RC-Oscillator 1
RC-Oscillator 2
4-MHz Oscillator
32-kHz Oscillator
External Input
Clock at SCLIN
Active
RUN
1
RUN
RUN
Enabled
Standby
SLEEP
1
RUN
RUN
Enabled
Halt
SLEEP
0
STOP
RUN
Disabled
相關PDF資料 |
PDF描述 |
|---|---|
| M44C588 | 4-BIT, MROM, 4 MHz, MICROCONTROLLER |
| M44C892 | 4-BIT, MROM, 4 MHz, MICROCONTROLLER, PDSO20 |
| M48T08Y-15PC1 | 0 TIMER(S), REAL TIME CLOCK, PDMA28 |
| M48T08Y-10PC1 | 0 TIMER(S), REAL TIME CLOCK, PDMA28 |
| M48T128Y-70PM1 | 0 TIMER(S), REAL TIME CLOCK, PDIP32 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| M44C890 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:Low-Current Microcontroller for Wireless Communication |
| M44C890-H | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:Low-Current Microcontroller for Wireless Communication |
| M44S05K4F1 | 功能描述:汽車連接器 MX44 Terminals RoHS:否 制造商:Amphenol SINE Systems 產(chǎn)品:Contacts 系列:ATP 位置數(shù)量: 型式:Female 安裝風格: 端接類型: 觸點電鍍:Nickel |
| M44T332538880MHZ | 制造商:MEC 功能描述: |
| M44T3338880MHZ | 制造商:MEC 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復。