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參數(shù)資料
| 型號： | M44C510D-XXX-DOW |
| 廠商： | TEMIC SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, MICROCONTROLLER |
| 封裝： | SSOP-44 |
| 文件頁數(shù)： | 17/60頁 |
| 文件大?。?/td> | 709K |
| 代理商： | M44C510D-XXX-DOW |
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M44C510E
Rev. A1, 04-May-00
Preliminary Information
24 (60)
2.2.4
Bidirectional Port 6
Master reset
Q
V
DD
V
DD
BP6y
Mask options
*
P6DATy
I/O Bus
D
IN enable
I/O Bus
*
Pull-up
Pull-down
V
DD
*
Static
Pull-up
(Data out)
*
S
13382
y = 0 or 1
Strong
4k @ 5 V
*
V
DD
Static
Pull-down
Strong
4k @ 5 V
Figure 21. Bidirectional Port 6
This 2-bit bidirectional port can be used as bitwise-pro-
grammable I/O. The data is LSB aligned so that the two
MSB’s will not appear on the port pins when written. The
port pins can also be used as external interrupt inputs (see
figures 21 and 22). Both interrupts can be masked or inde-
pendently configured to trigger on either edge. The
interrupt priority levels are also configurable. The
interrupt configuration and port direction is controlled by
the Port 6 Control Register (P6CR). An additional low
resistance pull-up transistor (mask option) provides an
internal bus pull-up for serial bus applications.
In output mode (PxDDR bit = 0), the respective Port Data
Register (PxDAT) bit appears on the port pin, driven by
an output port driver stage which can be mask pro-
grammed as open drain, or full complementary CMOS.
With an IN instruction the actual pin state can be read
back into the controller at any time without changing the
port directional mode. If the output port is mask config-
ured as an open drain driver, the controller is able to
receive the external data on this pin without switching
into input mode as long as the output transistor is switched
off.
In input mode (PxDDR bit = 1), the output driver stage is
deactivated, so that an IN instruction will directly read the
pin state which can be driven from an external source. In
this case, the state of the Port Data Register (PxDAT),
although not appearing at the pin itself, remains
unchanged. High resistance mask selectable pull-up or
pull-down transistors are automatically switched onto the
port pin in input mode. The Port Data Register is written
to the respective port address with an OUT instruction.
The Port 6 Data Register (P6DAT) is I/O mapped to the
primary address register of address ’6’hex and the Port 6
Control Register (P6CR) to the corresponding auxiliary
register. The P6CR is a byte wide register and is written
by writing the low nibble first and then the high nibble
(see section 2.1 “Addressing peripherals”).
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