參數(shù)資料
型號(hào)： M44C510D-XXX-DOW
廠商： TEMIC SEMICONDUCTORS
元件分類(lèi)： 微控制器/微處理器
英文描述： 4-BIT, MROM, MICROCONTROLLER
封裝： SSOP-44
文件頁(yè)數(shù)： 13/60頁(yè)
文件大?。?/td> 709K
代理商： M44C510D-XXX-DOW
M44C510E
Rev. A1, 04-May-00
Preliminary Information
20 (60)
2.2
Bidirectional Ports
Table 8. Overview of Port Features
Port Address
0
1
4
5
6
7
A
B
C
Number of bits
4
2
4
Bitwise programmable
direction
no
yes
Output drivers mask
configurable 1)
no 2)
yes
Dynamic pullup/ down
typ. (Ohm) 3)
500k
Static pullup/ down typ.
(Ohm) 4)
none
30k
4k
30k
Schmitt trigger inputs
yes
no
yes
no
yes
no
Additional functions
Timer 0
External
interrupt
Port
monitor/
coded re-
set
Port
monitor
1)
Either ”open drain down”, ”open drain up” or CMOS output configuration.
2)
This output must always be CMOS.
3)
The Dyanamic pullup/down transistors are mask programmable and if programmed, are only activated when the associated complementry
driver transistor is off. ie. A dynamic pull up transistor is only active when the port is either in input mode (both drivers off) or when a logical
1 is written to the port pad (low driver off) in output mode. (figure 19)
4)
The Static Pullup/down transitors are mask programmed and if programmed are always active independant of the port direction or driven
state. (figure 19)
For further data see section 3.2 .
All Ports (0, 1, 4, 5, 7, A, B and C with the exception of
Port 6) are 4 bits wide. Port 6 has a data width of 2 bits (bit
0 and bit 1) only. The ports may be used for data input or
output. All ports that can either directly or indirectly gen-
erate an interrupt are equipped with Schmitt-trigger
inputs. A variety of mask options are available such as
open drain, open source and full complementary outputs
as well as different types of pull-up and pull-down transis-
tors. All Port Data Registers (PxDAT) are I/O mapped to
the primary address register of the respective port ad-
dress, and the Port Data Direction Register (PxDDR) to
the corresponding auxiliary register.
All bidirectional ports except Port 0 and Port 1, include
a bitwise- programmable Data Direction Register
(PxDDR) which allows the individual programming of
each port bit as input or output. It is also possible to read
the pin condition when in output mode. This is a useful
feature for self testing and for collision detection on
wired-OR bus systems.
There are five different types of bidirectional ports:
D Ports 0 and 1 – 4-bit wide, bidirectional ports with au-
tomatic full bus width direction switching.
D Port 4 – 4-bit wide, bitwise programmable bidirec-
tional port also provides the I/O interface to Timer 0
and the Buzzer.
D Ports 5, 7 and C – 4-bit wide, bitwise programmable
high drive I/O port.
D Port 6 – 2-bit wide, bitwise programmable bidirec-
tional ports with optional static (4 k
W) pull-up/-down
and programmable interrupt logic.
D Ports A and B – 4-bit wide, bitwise programmable
bidirectional ports with optional port monitor func-
tion.
Port Data Register (PxDAT)
Primary register address: ’Port address’hex
Bit 3
Bit 2
Bit 1
Bit 0
PxDAT
PxDAT3
PxDAT2
PxDAT1
PxDAT0
Reset value: 1111b
Bit 3
→ MSB, bit 0 → LSB, x → Port address
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