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參數(shù)資料
| 型號： | M44C510D-XXX-DOW |
| 廠商： | TEMIC SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, MICROCONTROLLER |
| 封裝： | SSOP-44 |
| 文件頁數(shù)： | 14/60頁 |
| 文件大小： | 709K |
| 代理商： | M44C510D-XXX-DOW |
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M44C510E
Preliminary Information
Rev. A1, 04-May-00
21 (60)
Port Data Direction Register (PxDDR)
Auxiliary register address: ’Port address’hex
Bit 3
Bit 2
Bit 1
Bit 0
PxDDR
PxDDR3
PxDDR2
PxDDR1
PxDDR0
Reset value: 1111b
Table 9. Port Data Direction Register (PxDDR)
Code: 3 2 1 0
Function
x x x 1
BPx0 in input mode
x x x 0
BPx0 in output mode
x x 1 x
BPx1 in input mode
x x 0 x
BPx1 in output mode
x 1 x x
BPx2 in input mode
x 0 x x
BPx2 in output mode
1 x x x
BPx3 in input mode
0 x x x
BPx3 in output mode
2.2.1
Bidirectional Port 0 and Port 1
In this port type, the data direction register is not indepen-
dently software programmable because the direction of
the complete port is switched automatically when an I/O
instruction occurs (see figure 18). The port can be
switched to output mode with an OUT instruction and to
input with an IN instruction. The data written to a port will
be stored in the output data latches and appears immedi-
ately at the port pin following the OUT instruction. After
RESET, all output latches are set to ’1’ and the ports are
switched to input mode. An IN instruction reads the
condition of the associated pins.
Note: Care must be taken when switching these bidirec-
tional ports from output to input. The capacitive pin
loading at this port, in conjunction with the high resis-
tance pull-ups, may cause the CPU to read the contents of
the output data register rather than the external input state.
This can be avoided by using either of the following pro-
gramming techniques:
D Use two IN instructions and DROP the first data
nibble. The first IN switches the port from output to
input and the DROP removes the first invalid nibble.
The second IN reads the valid pin state.
D Use an OUT instruction followed by an IN instruction.
With the OUT instruction, the capacitive load is
charged or discharged depending on the optional
pull-up /pull-down configuration. Write a “1” for pins
with pull-up resistors, and a “0” for pins with pull-
down resistors.
OUT
IN
Reset
I/O Bus
D
R
S
Q
NQ
R
Master reset
PxDATy
*) Maskoptions
(Data out)
(Direction)
Port 1 only
BPxy
VDD
*
Pull-up
*
Pull-down
*
VDD
*
14020
Figure 18. Bidirectional Ports 0 and 1
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