參數(shù)資料
型號： M44C510D-XXX-DOW
廠商： TEMIC SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： 4-BIT, MROM, MICROCONTROLLER
封裝： SSOP-44
文件頁數(shù)： 26/60頁
文件大?。?/td> 709K
代理商： M44C510D-XXX-DOW
M44C510E
Rev. A1, 04-May-00
Preliminary Information
32 (60)
Timer/Counter Interrupt Priority Register (TCIP)
The Timer/Counter Interrupt Priority register (TCIP) is used to configure the Timer 0 and Timer 1 interrupt priority
levels.
Subport address (indirect write access): ’7’hex of Port address ’9‘hex
Bit 3
Bit 2
Bit 1
Bit 0
TCIP
T1IP2
T1IP11
T0IP2
T0IP1
Reset value: 1111b
T0IP2, T0IP1 – Timer 0 Interrupt Priority code
T1IP2, T1IP1 – Timer 1 Interrupt Priority code
Table 16. Timer/Counter Interrupt Priority Register (TCIP)
Code
3 2 1 0
Function
x x 1 1
Timer 0 interrupt priority 1
x x 1 0
Timer 0 interrupt priority 3
x x 0 1
Timer 0 interrupt priority 5
x x 0 0
Timer 0 interrupt priority 7
1 1 x x
Timer 1 interrupt priority 0
1 0 x x
Timer 1 interrupt priority 2
0 1 x x
Timer 1 interrupt priority 4
0 0 x x
Timer 1 interrupt priority 6
Timer/Counter I/O Control Register (TCIOR)
Subport address (indirect write access): ’5’hex of Port adddress ’9‘hex
Bit 3
Bit 2
Bit 1
Bit 0
TCIOR
TCIO3
TCIO2
TCIO1
TCIO0
Reset value: 1111b
TCIO3...0 – Timer / Counter I/0 mode select
Table 17. Timer/Counter I/O Control Register (TCIOR)
Code
3 2 1 0
Function
x x x 1
BP40 – standard port mode
x x x 0
BP40 – Timer 0 clock input (T0IN0) or Timer 0 output (T0OUT0)
x x 1 x
BP41 – standard port mode
x x 0 x
BP41 – Timer 0 gate input (T0IN1) or Timer 0 output (T0OUT1)
x 1 x x
BP42 – standard port mode
x 0 x x
BP42 – Buzzer output (BUZ)
1 x x x
BP43 – standard port mode
0 x x x
BP43 – Buzzer output (NBUZ)
By using the Timer/Counter I/O Control Register
(TCIOR) the program can configure the respective Port 4
pins as either standard data I/O ports or as external signal
ports for the Timer 0 and Buzzer. The Timer 1 uses a dedi-
cated I/O pin TIM1, whose direction is controlled solely
by the TCCR (see figure 24). It should be noted that if a
TCIOR bit is set low, then the corresponding port data
direction register (P4DDR) bit no longer influences the
port direction. In the case of BP40 and BP41, the port
direction is then controlled entirely by the timer/counter
configuration registers (TCCR,T0MO), while pins BP42
and BP43 become unidirectional buzzer outputs.
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