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參數(shù)資料
| 型號(hào)： | LPC47B34X |
| 廠商： | STANDARD MICROSYSTEMS CORP |
| 元件分類： | 外設(shè)及接口 |
| 英文描述： | 128 Pin Enhanced Super I/O with LPC Interface for Consumer Applications |
| 中文描述： | MULTIFUNCTION PERIPHERAL, PQFP128 |
| 封裝： | QFP-128 |
| 文件頁(yè)數(shù)： | 92/250頁(yè) |
| 文件大小： | 645K |
| 代理商： | LPC47B34X |
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INFRARED INTERFACE
The infrared interface provides a two-way wireless communications port using infrared as a
transmission medium. Several IR implementations have been provided for the second UART in this
chip (logical device 5), IrDA and Amplitude Shift Keyed IR. The IR transmission can use the standard
UART2 TXD2 and RXD2 pins or optional IRTX2 and IRRX2 pins. These can be selected through the
configuration registers.
IrDA 1.0 allows serial communication at baud rates up to 115.2 kbps. Each word is sent serially
beginning with a zero value start bit. A zero is signaled by sending a single IR pulse at the beginning
of the serial bit time. A one is signaled by sending no IR pulse during the bit time. Please refer to the
AC timing for the parameters of these pulses and the IrDA waveform.
The Amplitude Shift Keyed IR allows asynchronous serial communication at baud rates up to 19.2K
Baud. Each word is sent serially beginning with a zero value start bit. A zero is signaled by sending a
500KHz waveform for the duration of the serial bit time. A one is signaled by sending no transmission
during the bit time. Please refer to the AC timing for the parameters of the ASK-IR waveform.
If the Half Duplex option is chosen, there is a time-out when the direction of the transmission is
changed. This time-out starts at the last bit transferred during a transmission and blocks the receiver
input until the timeout expires. If the transmit buffer is loaded with more data before the time-out
expires, the timer is restarted after the new byte is transmitted. If data is loaded into the transmit
buffer while a character is being received, the transmission will not start until the time-out expires after
the last receive bit has been received. If the start bit of another character is received during this time-
out, the timer is restarted after the new character is received. The IR half duplex time-out is
programmable via CRF2 in Logical Device 5. This register allows the time-out to be programmed to
any value between 0 and 10msec in 100usec increments.
The following figure shows the block diagram of the IR components in the LPC47B34x:
ACE UART
IrDA SIR
Sharp ASK
COM
ACE
Registers
Output
MUX
IR
COM
Host Interface
IR Options Register,
Bit 6
FIGURE 1 – IR COMPONENTS/BLOCK DIAGRAM
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