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參數(shù)資料
| 型號(hào)： | LPC47B34X |
| 廠商： | STANDARD MICROSYSTEMS CORP |
| 元件分類： | 外設(shè)及接口 |
| 英文描述： | 128 Pin Enhanced Super I/O with LPC Interface for Consumer Applications |
| 中文描述： | MULTIFUNCTION PERIPHERAL, PQFP128 |
| 封裝： | QFP-128 |
| 文件頁(yè)數(shù)： | 73/250頁(yè) |
| 文件大?。?/td> | 645K |
| 代理商： | LPC47B34X |
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On the read back by the FDC, the controller must begin synchronization at the beginning of the sync
field. For the conventional mode, the internal PLL VCO is enabled (VCOEN) approximately 24 bytes
from the start of the Gap2 field. But, when the controller operates in the 1 Mbps perpendicular mode
(WGATE = 1, GAP = 1), VCOEN goes active after 43 bytes to accommodate the increased Gap2 field
size. For both cases, and approximate two-byte cushion is maintained from the beginning of the sync
field for the purposes of avoiding write splices in the presence of motor speed variation.
For the Write Data case, the FDC activates Write Gate at the beginning of the sync field under the
conventional mode. The controller then writes a new sync field, data address mark, data field, and
CRC. With the pre-erase head of the perpendicular drive, the write head must be activated in the
Gap2 field to insure a proper write of the new sync field. For the 1 Mbps perpendicular mode
(WGATE = 1, GAP = 1), 38 bytes will be written in the Gap2 space. Since the bit density is
proportional to the data rate, 19 bytes will be written in the Gap2 field for the 500 Kbps perpendicular
mode (WGATE = 1, GAP =0).
It should be noted that none of the alterations in Gap2 size, VCO timing, or Write Gate timing affect
normal program flow. The information provided here is just for background purposes and is not
needed for normal operation. Once the Perpendicular Mode command is invoked, FDC software
behavior from the user standpoint is unchanged.
The perpendicular mode command is enhanced to allow specific drives to be designated
Perpendicular recording drives. This enhancement allows data transfers between Conventional and
Perpendicular drives without having to issue Perpendicular mode commands between the accesses of
the different drive types, nor having to change write pre-compensation values.
When both GAP and WGATE bits of the PERPENDICULAR MODE COMMAND are both programmed
to "0" (Conventional mode), then D0, D1, D2, D3, and D4 can be programmed independently to "1" for
that drive to be set automatically to Perpendicular mode. In this mode the following set of conditions
also apply:
1. The GAP2 written to a perpendicular drive during a write operation will depend upon the
programmed data rate.
2. The write pre-compensation given to a perpendicular mode drive will be 0ns.
3. For D0-D3 programmed to "0" for conventional mode drives any data written will be at the currently
programmed write pre-compensation.
Note: Bits D0-D3 can only be overwritten when OW is programmed as a "1". If either GAP or
WGATE is a "1" then D0-D3 are ignored.
Software and hardware resets have the following effect on the PERPENDICULAR MODE COMMAND:
1. "Software" resets (via the DOR or DSR registers) will only clear GAP and WGATE bits to "0". D0-
D3 are unaffected and retain their previous value.
1. "Hardware" resets will clear all bits (GAP, WGATE and D0-D3) to "0", i.e. all conventional
mode.
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