參數(shù)資料
型號(hào)： FW82439TX
英文描述： Controller Miscellaneous - Datasheet Reference
中文描述： 控制器雜項(xiàng)-數(shù)據(jù)表參考
文件頁數(shù)： 21/102頁
文件大?。?/td> 759K
代理商： FW82439TX
Extended Temperature 82439TX (MTXC) Datasheet
21
PRELIMINARY
3.1.1.
PM2_CNTRL
PM2 REGISTER BLOCK
I/O Address:
Default Value:
Access:
0022h
00h
Read/Write
Bit
Descriptions
7:1
Reserved.
0
Arbiter Disable (ARB_DIS)
.
When ARB_DIS=1, the MTXC does not respond to any REQ# signals
(including PHOLD#) going active until this bit is set back to 0. This bit is used to disable bus master
accesses prior to placing the CPU in a stop clock state. This bit maintains cache coherency by
preventing PCI masters from gaining access to the PCI bus and causing snoop cycle activity.
MCTL[Bit 6] (offset 79h) must be set to 1 before this register is accessible.
3.1.2.
CONFADD
CONFIGURATION ADDRESS REGISTER
I/O Address:
Default Value:
Access:
0CF8h (Accessed as a DWord)
00000000h
Read/Write
CONFADD is a 32-bit register accessed only when referenced as a DWord. A Byte or Word reference will
“pass through” the Configuration Address Register onto the PCI bus. The CONFADD register contains the
Bus Number, Device Number, Function Number, and Register Number for which a subsequent configuration
access is intended.
Bit
Descriptions
31
Configuration Enable (CONE).
1=Enable. 0=Disable.
30:24
Reserved.
23:16
Bus Number.
When the Bus Number is programmed to 00h the target of the Configuration Cycle
is either the MTXC or the PCI Local Bus that is directly connected to the MTXC, depending on the
Device Number field. A type 0 Configuration Cycle is generated on PCI if the Bus Number is
programmed to 00h and the MTXC is not the target. If the Bus Number is non-zero a type 1
configuration cycle is generated on PCI with the Bus Number mapped to AD[23:16] during the
address phase.
15:11
Device Number.
This field selects one agent on the PCI bus selected by the Bus Number. During
a Type 1 Configuration cycle this field is mapped to AD[15:11]. During a Type 0 Configuration
Cycle this field is decoded and one of AD[31:11] is driven to a 1. The MTXC is always Device
Number 0.
10:8
Function Number.
This field is mapped to AD[10:8] during PCI configuration cycles. This allows
the configuration registers of a particular function in a multi-function device to be accessed. The
MTXC responds to configuration cycles with a function number of 000b; all other function number
values attempting access to the MTXC (Device Number=0, Bus Number=0) will generate a type 0
configuration cycle onto the PCI bus with no IDSEL asserted, which will result in a master abort.
7:2
Register Number.
This field selects one register within a particular Bus, Device, and Function as
specified by the other fields in the Configuration Address Register. This field is mapped to AD[7:2]
during PCI configuration cycles.
1:0
Reserved.
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