
CYRF69103
Document #: 001-07611 Rev *B
Page 63 of 73
Absolute Maximum Ratings
Storage Temperature ..................................–65°C to +150°C
Ambient Temperature with Power Applied........0°C to +70°C
Supply Voltage on any power supply pin relative to V
SS
–0.3V
to +3.9V
DC Voltage to Logic Inputs
[8]
...................–0.3V to V
IO
+0.3V
DC Voltage applied to Outputs in High-Z State.. –0.3V to V
IO
+0.3V
Static Discharge Voltage (Digital)
[9]
...........................>2000V
Static Discharge Voltage (RF)
[9]
................................. 1100V
Latch-up Current......................................+200 mA, –200 mA
Ground Voltage..................................................................0V
F
OSC
(Crystal Frequency)...........................12 MHz ±30 ppm
Mnemonic
DATA_CODE_ADR
Address
0x23
Length
16 Bytes
R/W
R/W
Default
0x02F9939702FA5CE3012BF1DB0132BE6F
This file is ignored when using the device in 1-Mbps GFSK mode. In 64-SDR mode, only the first eight bytes are used; in order to complete
the file write process, these eight bytes must be followed by eight bytes of “dummy” data. In 32-SDR mode, only four bytes are used, and in
32-DDR mode only eight bytes are used. In 64-DDR and 8DR modes, all sixteen bytes are used. Certain sixteen-byte sequences have been
calculated that provide excellent auto-correlation and cross-correlation properties, and it is recommended that such sequences be used; the
default value of this register is one such sequence. In typical applications, all devices use the same DATA_CODE_ADR codes, and devices
and systems are addressed by using different SOP_CODE_ADR codes; in such cases it may never be necessary to change the contents of
this register from the default value.
When reading this file, all sixteen bytes must be read; if fewer than sixteen bytes are read from the file, the contents of the file will have been
rotated by the number of bytes read. This applies to writes, as well.
Typical applications should use the default code.
Do not access or modify the register during a transmit or receive.
Mnemonic
PREAMBLE_ADR
Address
0x24
Length
3 Bytes
R/W
R/W
Default
0x333302
Byte 1 – The number of repetitions of the preamble sequence that are to be transmitted. The preamble may be disabled by writing 0x00 to this
byte.
Byte 2 – Least significant eight chips of the preamble sequence
Byte 3– Most significant eight chips of the preamble sequence
If using 64-SDR to communicate with CYWUSB69xx devices, set number of repetitions to four for optimum performance
When reading this file, all three bytes must be read; if fewer than three bytes are read from the file, the contents of the file will have been rotated
by the number of bytes read. This applies to writes, as well.
D
o not access or modify this register during Transmit or Receive.
Mnemonic
MFG_ID_ADR
Address
0x25
Length
6 Bytes
R
R
Default
NA
Byte 1 – 4 bits version + 2 bits vendor ID + high 2 bits of Year
Byte 2 through Byte 6: Manufacturing ID for the device.
To minimize ~190
μ
A of current consumption (default), execute a ‘dummy’ single-byte SPI write to this address with a zero data stage after the
contents have been read. Non-zero to enable reading of fuses. Zero to disable reading fuses.
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