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參數(shù)資料
| 型號： | CYRF69103 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | Programmable Radio on Chip Low Power |
| 中文描述： | 可編程片上無線電低功耗 |
| 文件頁數(shù)： | 3/73頁 |
| 文件大?。?/td> | 683K |
| 代理商： | CYRF69103 |
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CYRF69103
Document #: 001-07611 Rev *B
Page 3 of 73
Backward Compatibility
The CYRF69103 IC is fully interoperable with the main modes
of other Cypress radios CYWUSB6934 and CYRF69103. The
62.5-kbps mode is supported by selecting 32-chip
DATA_CODE_ADR codes, DDR mode, and disabling the
SOP, length, and CRC16 fields. Similarly, the 15.675-kHz
mode is supported by selecting 64-chip DATA_CODE_ADR
codes and SDR mode.
In this way, a suitably configured CYRF69103 IC device may
transmit data to and/or receive data from a first generation
device.
Pinout
Pin
Name
P0.4
XTAL
V
CC
P0.3
P0.1
V
bat1
P2.1
V
bat2
RF
bias
RF
p
GND
RF
n
NC
P2.0
RESV
P1.0
P1.1
V
DD_micro
P1.2
P1.3 / nSS
P1.4 / SCK
IRQ
P1.5 / MOSI
MISO
XOUT
PACTL
P1.6
V
IO
RST
Function/Description
1
2
3, 7, 16
4
5
6
8
9
10
11
12
13
14, 17, 18, 20
15
19
21
22
23
24
25
26
27
28
29
30
31
32
33
34
Individually configured GPIO
12 MHz crystal
2.4V to 3.6V supply. Connected to pin 40 (0.047-
μ
F bypass)
Individually configured GPIO
Individually configured GPIO
Connect to 1.8V to 3.6V power supply, through 47-ohm series/1-
μ
F shunt C
GPIO. Port 2 Bit 1
Connected to1.8V to 3.6V main power supply, through 0.047-
μ
F bypass C
RF pin voltage reference
Differential RF to/from antenna
GND
Differential RF to/from antenna
GPIO
Reserved. Must connect to GND
GPIO
GPIO
MCU supply connected to pin 40, max CPU 12 MHz
GPIO
Slave Select
SPI Clock
Radio Function Interrupt output, configure High, Low or as Radio GPIO
MOSI pin from microcontroller function to radio function
3-wire SPI mode configured as Radio GPIO. In 4-wire SPI mode sends data to MCU function
Buffered CLK, PACTL_n or Radio GPIO
Control for external PA or Radio GPIO
GPIO
1.8V to 3.6V to main power supply rail for Radio IO
Radio Reset. Connected to pin 40 with 0.47
μ
F. Must have a RST=HIGH event the very first
time power is applied to the radio otherwise the state of the radio control registers is unknown
GPIO
Regulated logic bypass. Connected to 0.47
μ
F to GND
Inductor/Diode connection for Boost. When Internal PMU is not being used connect L/D to
GND.
GPIO
Connected to1.8V to 3.6V main power supply, through 0.047-
μ
F bypass C
Boost regulator output voltage feedback
35
36
37
P1.7
V
DD1.8
L/D
38
39
40
P0.7
V
bat0
V
REG
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| CYRF69103_12 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Programmable Radio on Chip Low Power |
| CYRF69103_13 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Programmable Radio on Chip Low Power |
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