參數(shù)資料
型號(hào)： CYRF69103
廠商： Cypress Semiconductor Corp.
英文描述： Programmable Radio on Chip Low Power
中文描述： 可編程片上無線電低功耗
文件頁數(shù)： 24/73頁
文件大小： 683K
代理商： CYRF69103
CYRF69103
Document #: 001-07611 Rev *B
Page 24 of 73
LPOSC Trim
CPU Clock During Sleep Mode
When the CPU enters sleep mode the CPUCLK Select (Bit [0],
Table 32
) is forced to the internal oscillator, and the oscillator
is stopped. When the CPU comes out of sleep mode it is
running on the internal oscillator. The internal oscillator
recovery time is three clock cycles of the Internal 32-kHz
Low-power Oscillator.
If the system requires the CPU to run off the external clock
after awakening from sleep mode, firmware will need to switch
the clock source for the CPU. If the external clock source is the
external oscillator and the oscillator is disabled, firmware will
need to enable the external oscillator, wait for it to stabilize,
and then change the clock source.
Reset
The microcontroller supports two types of resets: Power-on
Reset (POR) and Watchdog Reset (WDR). When reset is
initiated, all registers are restored to their default states and all
interrupts are disabled.
The occurrence of a reset is recorded in the System Status and
Control Register (CPU_SCR). Bits within this register record
the occurrence of POR and WDR Reset respectively. The
firmware can interrogate these bits to determine the cause of
a reset.
The microcontroller resumes execution from Flash address
0x0000 after a reset. The internal clocking mode is active after
a reset, until changed by user firmware.
Note
The CPU clock defaults to 3 MHz (Internal 24-MHz Oscil-
lator divide-by-8 mode) at POR to guarantee operation at the
low V
CC
that might be present during the supply ramp.
Table 36.LPOSC Trim (LPOSCTR) [0x36] [R/W]
Bit #
7
6
5
4
3
2
1
0
Field
Read/Write
Default
This register is used to calibrate the 32-KHz Low-speed Oscillator. The reset value is undefined but during boot the SROM writes a calibration
value that is determined during manufacturing test. This is the meaning of ‘D’ in the Default field. The trim value can be adjusted vs. voltage as
noted in
Table 32
Bit 7
32-KHz Low Power
0 = The 32-KHz Low-speed Oscillator operates in normal mode
1 = The 32-KHz Low-speed Oscillator operates in a low-power mode. The oscillator continues to function normally but with
reduced accuracy
Bit 6
Reserved
Bits [:4
32-KHz Bias Trim [1:0]
These bits control the bias current of the low-power oscillator
0 0 = Mid bias
0 1 = High bias
1 0 = Reserved
1 1 = Reserved
Important Note
Do not program the 32-KHz Bias Trim [1:0] field with the reserved 10b value as the oscillator does not oscillate at all corner
conditions with this setting
Bits 3:0
32-kHz Freq Trim [3:0]
These bits are used to trim the frequency of the low-power oscillator
32-kHz Low
Power
R/W
0
Reserved
32-kHz Bias Trim [1:0]
32-kHz Freq Trim [3:0]
–
–
R/W
D
R/W
D
R/W
D
R/W
D
R/W
D
R/W
D
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