參數(shù)資料
型號(hào)： CYRF69103
廠商： Cypress Semiconductor Corp.
英文描述： Programmable Radio on Chip Low Power
中文描述： 可編程片上無(wú)線電低功耗
文件頁(yè)數(shù)： 18/73頁(yè)
文件大小： 683K
代理商： CYRF69103
CYRF69103
Document #: 001-07611 Rev *B
Page 18 of 73
determines the length of the write pulse that will be used to
store the data in the Flash. The CLOCK and DELAY values are
dependent on the CPU. Refer to ‘Clocking’ Section for
additional information.
EraseBlock Function
The EraseBlock function is used to erase a block of 64
contiguous bytes in Flash. The first thing the EraseBlock
function does is to check the protection bits and determine if
the desired BLOCKID is writable. If write protection is turned
on, the EraseBlock function will exit, setting the accumulator
and KEY2 back to 00h. KEY1 will have a value of 01h,
indicating a write failure. The EraseBlock function is only
useful as the first step in programming. Erasing a block will not
cause data in a block to be one hundred percent unreadable.
If the objective is to obliterate data in a block, the best method
is to perform an EraseBlock followed by a WriteBlock of all
zeros.
To set up the parameter block for the EraseBlock function,
correct key values must be stored in KEY1 and KEY2. The
block number to be erased must be stored in the BLOCKID
variable and the CLOCK and DELAY values must be set based
on the current CPU speed.
ProtectBlock Function
The CYRF69103 device offers Flash protection on a
block-by-block basis.
Table 26
lists the protection modes
available. In the table, ER and EW are used to indicate the
ability to perform external reads and writes. For internal writes,
IW is used. Internal reading is always permitted by way of the
ROMX instruction. The ability to read by way of the SROM
ReadBlock function is indicated by SR. The protection level is
stored in two bits, according to
Table 26
. These bits are bit
packed into the 64 bytes of the protection block. Therefore,
each protection block byte stores the protection level for four
Flash blocks. The bits are packed into a byte, with the lowest
numbered block’s protection level stored in the lowest
numbered bits.
The first address of the protection block contains the
protection level for blocks 0 through 3; the second address is
for blocks 4 through 7. The 64th byte will store the protection
level for blocks 252 through 255.
The level of protection is only decreased by an EraseAll, which
places zeros in all locations of the protection block. To set the
level of protection, the ProtectBlock function is used. This
function takes data from SRAM, starting at address 80h, and
ORs it with the current values in the protection block. The
result of the OR operation is then stored in the protection
block. The EraseBlock function does not change the
protection level for a block. Because the SRAM location for the
protection data is fixed and there is only one protection block
per Flash macro, the ProtectBlock function expects very few
variables in the parameter block to be set prior to calling the
function. The parameter block values that must be set, besides
the keys, are the CLOCK and DELAY values.
EraseAll Function
The EraseAll function performs a series of steps that destroy
the user data in the Flash macros and resets the protection
block in each Flash macro to all zeros (the unprotected state).
The EraseAll function does not affect the three hidden blocks
above the protection block in each Flash macro. The first of
Table 24.WriteBlock Parameters
Name
KEY1
KEY2
Address
0,F8h
0,F9h
Description
3Ah
Stack Pointer value, when SSC is
executing
8-KB Flash block number (00h–7Fh)
4-KB Flash block number (00h–3Fh)
3-KB Flash block number (00h–2Fh)
First 64 addresses in SRAM where
the data to be stored in Flash is
located prior to calling WriteBlock
Clock Divider used to set the write
Pulse width
For a CPU speed of 12 MHz set to 56h
BLOCK ID
0,FAh
POINTER
0,FBh
CLOCK
0,FCh
DELAY
0,FEh
Table 25.EraseBlock Parameters
Name
KEY1
KEY2
Address
0,F8h
0,F9h
Description
3Ah
Stack Pointer value when SSC is
executed
Flash block number (00h–7Fh)
Clock Divider used to set the erase
pulse width
For a CPU speed of 12 MHz set to
56h
BLOCKID
CLOCK
0,FAh
0,FCh
DELAY
0,FEh
Table 26.Protection Modes
Mode
00b
01b
10b
Settings
SR ER EW IW Unprotected
SR ER EW IW Read protect
SR ER EW IW Disable external
write
SR ER EW IW Disable internal
write
Description
Marketing
Unprotected
Factory upgrade
Field upgrade
11b
Full protection
7
Block n+3
6
5
Block n+2
4
3
Block n+1
2
1
0
Block n
Table 27.ProtectBlock Parameters
Name
KEY1
KEY2
Address
0,F8h
0,F9h
Description
3Ah
Stack Pointer value when SSC is
executed
Clock Divider used to set the write
pulse width
For a CPU speed of 12 MHz set to 56h
CLOCK
0,FCh
DELAY
0,FEh
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