參數資料
型號: ARM610
廠商: Mitel Networks Corporation
英文描述: General Purpose 32-Bit Microprocessor with 4kByte Cache,Write Buffer and Memory Management Unit(通用32位微處理器(帶4K字節(jié)緩存,寫緩沖器和存儲器管理單元))
中文描述: 通用32位微處理器4KB的高速緩存,寫緩沖器和存儲器管理單元(通用32位微處理器(帶4K的字節(jié)緩存,寫緩沖器和存儲器管理單元))
文件頁數: 110/174頁
文件大?。?/td> 694K
代理商: ARM610
Memory Management Unit
ARM610 Data Sheet
9-6
The two least significant bits indicate the descriptor type and validity, and are
interpreted as shown below.
9.6
Page Table Descriptor
Bits 3:2
are always written as 0.
Bit 4 Updateable
write operation to maintain consistency with external memory (if the cache is enabled).
: indicates that the data in the cache should be updated during a
Bits 8:5
Control Register) that contain the primary access controls.
specify one of the sixteen possible domains (held in the Domain Access
Bits 31:10
for the entry is derived from the virtual address as illustrated in
page translation
on page 9-10).
form the base for referencing the Page Table Entry. (The page table index
·
Figure 9-7: Small
If a Page Table Descriptor is returned from the Level One fetch, a Level Two fetch is
initiated as described below.
Value
Meaning
Notes
0 0
Invalid
Generates a Section Translation Fault
0 1
Page
Indicates that this is a Page Descriptor
1 0
Section
Indicates that this is a Section Descriptor
1 1
Reserved
Reserved for future use
Table 9-1: Interpreting Level One Descriptor Bits [1:0]
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