參數(shù)資料
型號(hào): 84220
廠商: LSI Corporation
英文描述: Quad 100BaseTX/100BaseFX/10BaseT Physical Layer Device (Highly Integrated Ethernet Transceiver For Twisted Pair And Fiber Ethernet Applications)(四通道100BaseTX/100BaseFX/10BaseT 物理層處理器(高度集成的以太網(wǎng)雙絞線和光纖數(shù)據(jù)收發(fā)器))
中文描述: 四100BaseTX/100BaseFX/10BaseT物理層裝置(高度集成的以太網(wǎng)收發(fā)器,雙絞線和光纖以太網(wǎng)的應(yīng)用)(四通道100BaseTX/100BaseFX/10BaseT物理層處理器(高度集成的以太網(wǎng)雙絞線和光纖數(shù)據(jù)收發(fā)器) )
文件頁(yè)數(shù): 15/92頁(yè)
文件大?。?/td> 1401K
代理商: 84220
MD400177/B
84220
15
Table 1. 4B/5B Symbol Mapping
* These 5B codes are not used. For decoder, these 5B codes
are decoded to 4B 0000. For encoder, 4B 0000 is encoded to
5B 11110, as shown in symbol 0.
2.3.2 Manchester Encoder - 10 Mbps
The Manchester encoding process combines clock and
NRZ data such that the first half of the data bit contains
the complement of the data, and the second half of the
data bit contains the true data, as specified in IEEE 802.3.
This guarantees that a transition always occurs in the
middle of the bit cell. The 84220 Manchester encoder
converts the 10 Mbps NRZ data from the controller
interface into a single data stream for the TP transmitter
and adds a start of idle pulse (SOI) at the end of the
packet as specified in IEEE 802.3 and shown in Figure 2.
The Manchester encoding process is only done on actual
packet data, and the idle period between packets is not
Manchester encoded, but filled with link pulses.
Symbol
Name
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
Description
5B Code
4B Code
Data 0
Data 1
Data 2
Data 3
Data 4
Data 5
Data 6
Data 7
Data 8
Data 9
Data A
Data B
Data C
Data D
Data E
Data F
11110
01001
10100
10101
01010
01011
01110
01111
10010
10011
10110
10111
11010
11011
11100
11101
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
I
Idle
11111
0000
J
K
T
R
H
SSD #1
SSD #2
ESD #1
ESD #2
Halt
11000
10001
01101
00111
00100
0101
0101
0000
0000
Undefined
---
Invalid codes
All others*
0000*
2.3.3 Encoder Bypass
The 4B5B encoder can be bypassed by setting the bypass
encoder/decoder bit in the MI serial port Channel
Configuration register. When this bit is set to bypass the
encoder/decoder, 5B code words are passed directly from
the controller interface to the scrambler without any
alterations. Setting this bit automatically places the device
in the FBI mode as described in the Controller Interface
section.
2.4 DECODER
2.4.1 4B5B Decoder - 100 Mbps
Since the FX or TX input data is 4B5B encoded on the
transmit side, it must also be decoded by the 4B5B
decoder on the receive side. The mapping of the 5B
nibbles to the 4B code words is specified in IEEE 802.3
and shown in Table 1. The 84220 4B5B decoder takes the
5B code words from the descrambler, converts them into
4B nibbles per Table 1, and sends the 4B nibbles to the
controller interface. The 4B5B decoder also strips off the
SSD delimiter (/J/K/ symbols) and replaces them with two
4B Data 5 nibbles (/5/ symbol), and strips off the ESD
delimiter (/T/R/ symbols) and replaces it with two 4B Data
0 nibbles (/I/ symbol), per IEEE 802.3 specifications and
shown in Figure 2.
The 4B5B decoder detects SSD, ESD and, codeword
errors in the incoming data stream as specified in IEEE
802.3. These errors are indicated by asserting RXER
output while the errors are being transmitted across
RXD[3:0], and they are also indicated by setting SSD,
ESD, and codeword error bits in the MI serial port
Channel Status Output register.
2.4.2 Manchester Decoder - 10 Mbps
In Manchester coded data, the first half of the data bit
contains the complement of the data, and the second half
of the data bit contains the true data. The 84220
Manchester decoder converts the single data stream from
the TP receiver into NRZ data for the controller interface
by decoding the data and stripping off the SOI pulse.
Since the clock and data recovery block has already
separated the clock and data from the TP receiver, the
Manchester decoding process to NRZ data is inherently
performed by that block.
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