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IDT RC32438 Device Overview
RC32438 Internal Register Map
79RC32438 User Reference Manual
1 - 28
November 4, 2002
Notes
0x05_8104
ETH0SAH0
Ethernet 0 station address 0 high
0x05_8108
ETH0SAL1
Ethernet 0 station address 1 low
0x05_810C
ETH0SAH1
Ethernet 0 station address 1 high
0x05_8110
ETH0SAL2
Ethernet 0 station address 2 low
0x05_8114
ETH0SAH2
Ethernet 0 station address 2 high
0x05_8118
ETH0SAL3
Ethernet 0 station address 3 low
0x05_811C
ETH0SAH3
Ethernet 0 station address 3 high
0x05_8120
ETH0RBC
Ethernet 0 receive byte count
0x05_8124
ETH0RPC
Ethernet 0 receive packet count
0x05_8128
ETH0RUPC
Ethernet 0 receive undersized
packet count
0x05_812C
ETH0RFC
Ethernet 0 receive fragment count
0x05_8130
ETH0TBC
Ethernet 0 transmit byte count
0x05_8134
ETH0GPF
Ethernet 0 generate pause frame
0x05_8138 through 0x05_81FF
Reserved
0x05_8200
ETH0MAC1
Ethernet 0 MAC configuration 1
0x05_8204
ETH0MAC2
Ethernet 0 MAC configuration 2
0x05_8208
ETH0IPGT
Ethernet 0 back-to-back inter-
packet gap
0x05_820C
ETH0IPGR
Ethernet 0 non back-to-back inter-
packet gap
0x05_8210
ETH0CLRT
Ethernet 0 collision window retry
0x05_8214
ETH0MAXF
Ethernet 0 maximum frame length
0x05_8218
Reserved
0x05_821C
ETH0MTEST
Ethernet 0 MAC test
MII Management
0x05_8220
MIIMCFG
MII management configuration
MII Management
0x05_8224
MIIMCMD
MII management command
MII Management
0x05_8228
MIIMADDR
MII management address
MII Management
0x05_822C
MIIMWTD
MII management write data
MII Management
0x05_8230
MIIMRDD
MII management read data
MII Management
0x05_8234
MIIMIND
MII management indicators
0x05_8238 through 0x05_823C
Reserved
0x05_8240
ETH0CFSA0
Ethernet 0 control frame station
address 0
0x05_8244
ETH0CFSA1
Ethernet 0 control frame station
address 1
0x05_8248
ETH0CFSA2
Ethernet 0 control frame station
address 2
Function
Register Offset
Register
Name
Register Function
Table 1.3 Internal Register Map (Part 8 of 12)