Notes
79RC32438 User Reference Manual
18 - 1
November 4, 2002
Chapter 18
Debugging and Performance
Monitoring
Introduction
This chapter discusses the three different debugging features available on the RC32438: IPBus
Monitor, Event Monitor, and Debug Pins. These features can be used together or independently to aid in
system optimization or system debugging.
Features
IPBus Monitor provides an on-chip “l(fā)ogic analyzer” for hardware and software debugging
Eight 24-bit statistics counters
External debug support pins provide external visibility to internal operation
Debug and Performance Register Description
Register Offset
Register Name
Register Function
Size
0x09_000
IPBMTCFG
IPBus Monitor Trigger Configuration
32-bit
0x09_004
IPBMTS
IPBus Monitor Trigger Select
32-bit
0x09_008
IPBMMT
IPBus Monitor Manual Trigger
32-bit
0x09_00C
IPBMTC0
IPBus Monitor Trigger Condition 0
32-bit
0x09_010
IPBMTC1
IPBus Monitor Trigger Condition 1
32-bit
0x09_014
IPBMTC2
IPBus Monitor Trigger Condition 2
32-bit
0x09_018
IPBMTC3
IPBus Monitor Trigger Condition 3
32-bit
0x09_01C
IPBMFS
IPBus Monitor Filter Select
32-bit
0x09_020
IPBMFC0
IPBus Monitor Filter Control 0
32-bit
0x09_024
IPBMFC1
IPBus Monitor Filter Control 1
32-bit
0x09_028
IPBMFC2
IPBus Monitor Filter Control 2
32-bit
0x09_02C
IPBMRC
IPBus Monitor Record Control
32-bit
0x09_030
IPBMTT
IPBus Monitor Trigger Time
32-bit
0x09_034
IPBMTP
IPBus Monitor Trigger Position
32-bit
0x09_038
EMC
Event Monitor Control
32-bit
0x09_03C
EM0COMPARE
Event Monitor 0 Compare
32-bit
0x09_040
EM0COUNT
Event Monitor 0 Count
32-bit
0x09_044
EM1COUNT
Event Monitor 1 Count
32-bit
0x09_048
EM2COUNT
Event Monitor 2 Count
32-bit
0x09_04C
EM3COUNT
Event Monitor 3 Count
32-bit
0x09_050
EM4COUNT
Event Monitor 4 Count
32-bit
0x09_054
EM5COUNT
Event Monitor 5 Count
32-bit
Table 18.1 Debug and Performance Register Map (Part 1 of 2)