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IDT MIPS32 4Kc Processor Core
CP0 Registers
79RC32438 User Reference Manual
2 - 70
November 4, 2002
Notes
Config1 Register (CP0 Register 16, Select 1)
The Config1 register is an adjunct to the Config register and encodes additional capabilities information.
All fields in the Config1 register are read-only. The instruction and data cache configuration parameters
include encodings for the number of sets per way, the line size, and the associativity. The total cache size
for a cache is therefore:
Associativity * Line Size * Sets Per Way
If the line size is zero, there is no cache implemented.
Config1 Register Format — Select 1
31 30
C(2:0) Value
Cache Coherency Attribute
0, 1, 3
1
, 4, 5, 6
1.
These two values are required by the MIPS32 architecture. No other values are used. For ex-
ample, values 0, 1, 4, 5 and 6 are not used and are mapped to 3. The value 7 is not used and is
mapped to 2. Note that these values do have meaning in other MIPS Technologies processor im-
plementations. Refer to the MIPS32 specification for more information.
Cacheable, noncoherent, write-through, no write allocate
2
1
, 7
Uncached
Table 2.45 Cache Coherency Attributes
25 24
22 21
19 18
16 15
13 12
10 9
7 6 5 4
3
2 1 0
0
MMU Size
IS
IL
IA
DS
DL
DA
0
PCWRCAEP FP
Fields
Description
Read/
Write
Reset
State
Name
Bit(s)
0
31
This bit is reserved to and must be read or written as
zero.
R
0
MMU Size
30:25
This field contains the number of entries in the TLB
minus one. The field is read as 15 decimal.
R
Preset
IS
24:22
This field contains the number of instruction cache
sets per way. Three options are available. All others
values are reserved:
0x0: 64
0x1: 128
0x2: 256
0x3 - 0x7: Reserved
R
Preset
IL
21:19
This field contains the instruction cache line size. If
an instruction cache is present, it must contain a
fixed line size of 16 bytes.
0x0: No Icache present
0x3: 16 bytes
0x1, 0x2, 0x4 - 0x7: Reserved
R
Preset
IA
18:16
This field contains the level of instruction cache asso-
ciativity.
0x0: Direct mapped
0x1: 2-way
0x2: 3-way
0x3: 4-way
0x4 - 0x7: Reserved
R
Preset
Table 2.46 Config1 Register Field Descriptions — Select 1 (Part 1 of 2)