參數(shù)資料
型號: 28F3204C3
廠商: Intel Corp.
英文描述: 3 V Advanced+ Stacked Chip Scale Package Memory(3V高級堆芯片封裝存儲器)
中文描述: 3伏高級堆疊芯片級封裝存儲器(3V的高級堆芯片封裝存儲器)
文件頁數(shù): 54/62頁
文件大?。?/td> 538K
代理商: 28F3204C3
28F1602C3, 28F3204C3
E
54
PRODUCT PREVIEW
Table B9. Protection Register Information
Description
(Optional Flash Features and Commands)
Offset
(1)
P = 35h
Length
Add.
Hex
Code
Value
(P+E)h
1
Number of Protection register fields in JEDEC ID space.
“00h,” indicates that 256 protection bytes are available
43:
--01
01
(P+F)h
4
Protection Field 1: Protection Description
44:
--80
80h
(P+10)h
This field describes user-available One Time
Programmable (OTP) Protection register bytes. Some
are pre-programmed with device-unique serial numbers.
Others are user programmable. Bits 0–15 point to the
Protection register Lock byte, the section’s first byte. The
following bytes are factory pre-programmed and user-
programmable.
45:
--00
00h
(P+11)h
bits 0–7 = Lock/bytes JEDEC-plane physical low
address
bits 8–15 = Lock/bytes JEDEC -plane physical high
address
bits 16–23 = “n” such that 2
programmed bytes
bits 24–31 = “n” such that 2
bytes
n
= factory pre-
n
= user programmable
46:
--03
8 byte
(P+12)h
47:
--03
8 byte
(P+13)h
Reserved for future use
48:
NOTES:
1.
The variable P is a pointer which is defined at CFI offset 15h.
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