參數(shù)資料
型號: 28F3204C3
廠商: Intel Corp.
英文描述: 3 V Advanced+ Stacked Chip Scale Package Memory(3V高級堆芯片封裝存儲器)
中文描述: 3伏高級堆疊芯片級封裝存儲器(3V的高級堆芯片封裝存儲器)
文件頁數(shù): 49/62頁
文件大?。?/td> 538K
代理商: 28F3204C3
E
28F1602C3, 28F3204C3
49
PRODUCT PREVIEW
Table B2. Example of Query Structure Output of x16 and x8 Devices
Word Addressing
Byte Addressing
Offset
Hex Code
Value
Offset
Hex Code
Value
A
15
–A
0
0010h
0011h
0012h
0013h
0014h
0015h
0016h
0017h
0018h
...
D
15
–D
0
A
7
–A
0
10h
11h
12h
13h
14h
15h
16h
17h
18h
...
D
7
–D
0
0051
0052
0059
P_ID
LO
P_ID
HI
P
LO
P
HI
A_ID
LO
A_ID
HI
...
“Q”
“R”
“Y”
51
52
59
“Q”
“R”
“Y”
PrVendor
ID #
PrVendor
TblAdr
AltVendor
ID #
...
P_ID
LO
P_ID
LO
P_ID
HI
...
PrVendor
ID #
ID #
...
B.2
QUERY STRUCTURE OVERVIEW
The Query command causes the flash component to display the Common Flash Interface (CFI) Query
structure or “database.” The structure sub-sections and address locations are summarized below.
Table B3. Query Structure
(1)
Offset
Sub-Section Name
Description
00h
Manufacturer Code
01h
Device Code
(BA+2)h
(2)
Block Status Register
Block-Specific information
04-0Fh
Reserved
Reserved for vendor-specific information
10h
CFI Query Identification String
Command set ID and vendor data offset
1Bh
System Interface Information
Device timing & voltage information
27h
Device Geometry Definition
Flash device layout
P
(3)
Primary Intel
-
Specific Extended Query
Table
Vendor
-
defined additional information
specific to the Primary Vendor Algorithm
NOTES:
1. Refer to the Query Structure Output section and offset 28h for the detailed definition of offset address as a function of
device bus width and mode.
2. BA = The beginning location of a Block Address (e.g., 08000h is the beginning location of block 1 when the block size is
32 Kword).
3. Offset 15 defines
“P” which points to the Primary Intel
-
specific Extended Query Table.
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