參數(shù)資料
型號: 28F3204C3
廠商: Intel Corp.
英文描述: 3 V Advanced+ Stacked Chip Scale Package Memory(3V高級堆芯片封裝存儲器)
中文描述: 3伏高級堆疊芯片級封裝存儲器(3V的高級堆芯片封裝存儲器)
文件頁數(shù): 31/62頁
文件大?。?/td> 538K
代理商: 28F3204C3
E
9.8
28F1602C3, 28F3204C3
31
PRODUCT PREVIEW
Flash Reset Operations
IH
V
IL
V
RP# (P)
PLPH
t
IH
V
IL
V
RP# (P)
PLPH
t
(A) Reset during Read Mode
Abort
Complete
PLRH
PHQV
PHWL
PHEL
t
t
t
PHQV
PHWL
PHEL
t
t
t
(B) Reset during Program or Block Erase, <
PLPH
PLRH
t
t
IH
V
IL
V
RP# (P)
PLPH
t
Abort
Complete
PHQV
PHWL
PHEL
t
t
t
PLRH
t
Deep
Power-
Down
(C) Reset Program or Block Erase, >
PLPH
PLRH
t
Figure 8. AC Waveform: Reset Operation
Table 10. Reset Specifications
(1)
F-V
CC
2.7 V
–3.3 V
Symbol
Parameter
Notes
Min
Max
Unit
t
PLPH
F-RP# Low to Reset during Read
(If F-RP# is tied to V
CC
, this specification is not
applicable)
2,4
100
ns
t
PLRH1
t
PLRH2
NOTES:
1.
2.
3.
4.
F-RP# Low to Reset during Block Erase
3,4
22
μs
F-RP# Low to Reset during Program
3,4
12
μs
See Section 4.1.4 for a full description of these conditions.
If t
PLPH
is < 100 ns the device may still reset but this is not guaranteed.
If F-RP# is asserted while a block erase or
word program operation is not executing, the reset will complete within 100 ns.
Sampled, but not 100% tested.
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