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參數(shù)資料
| 型號(hào)： | 28F3204C3 |
| 廠商： | Intel Corp. |
| 英文描述： | 3 V Advanced+ Stacked Chip Scale Package Memory(3V高級(jí)堆芯片封裝存儲(chǔ)器) |
| 中文描述： | 3伏高級(jí)堆疊芯片級(jí)封裝存儲(chǔ)器（3V的高級(jí)堆芯片封裝存儲(chǔ)器） |
| 文件頁(yè)數(shù)： | 28/62頁(yè) |
| 文件大?。?/td> | 538K |
| 代理商： | 28F3204C3 |
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28F1602C3, 28F3204C3
E
28
PRODUCT PREVIEW
9.6
Flash AC Characteristics
—Write Operations
(1, 5, 6)
—Extended Temperature
Density
16 Mbit
32 Mbit
Product
–90
–110
–100
–110
3.0 V – 3.3 V
80
100
90
100
2.7 V – 3.3 V
90
110
100
110
#
Sym
t
PHWL
/
t
PHEL
t
ELWL
t
WLEL
Parameter
Note
Min
Min
Min
Min
Min
Min
Min
Min
Unit
W1
F-RP# High Recovery to
F-WE# (F-CE#) Going Low
150
150
150
150
150
150
150
150
ns
W2
F-CE# (F-WE#) Setup to
F-WE# (F-CE#) Going Low
0
0
0
0
0
0
0
0
ns
W3
t
ELEH
t
WLWH
F-WE# (F-CE#) Pulse
Width
4
50
60
70
70
60
70
70
70
ns
W4
t
DVWH
t
DVEH
Data Setup to F-WE#
(F-CE#) Going High
2
50
50
60
60
50
60
60
60
ns
W5
t
AVWH
t
AVEH
Address Setup to F-WE#
(F-CE#) Going High
2
50
60
70
70
60
70
70
70
ns
W6
t
WHEH
t
EHWH
F-CE# (F-WE#) Hold Time
from F-WE# (F-CE#) High
0
0
0
0
0
0
0
0
ns
W7
t
WHDX
t
EHDX
Data Hold Time from
F-WE# (F-CE#) High
2
0
0
0
0
0
0
0
0
ns
W8
t
WHAX
t
EHAX
Address Hold Time from
F-WE# (F-CE#) High
2
0
0
0
0
0
0
0
0
ns
W9
t
WHWL
t
EHEL
F-WE# (F-CE#) Pulse
Width High
4
30
30
30
30
30
30
30
30
ns
W10 t
VPWH
t
VPEH
F-V
Setup to F-WE#
(F-CE#) Going High
3
200
200
200
200
200
200
200
200
ns
W11 t
QVVL
F-V
PP
Hold from Valid SRD
3
0
0
0
0
0
0
0
0
ns
NOTES:
1.
2.
3.
4.
Write timing characteristics during erase suspend are the same as during write-only operations.
Refer to Table 5 for valid A
IN
or D
IN
.
Sampled, but not 100% tested.
Write pulse width (t
) is defined from F-CE# or F-WE# going low (whichever goes low last)
to F-CE# or F-WE# going high
(whichever goes high first). Hence, t
= t
= t
= t
= t
. Similarly, write pulse width high (t
) is defined
from F-CE# or F-WE# going high (whichever goes high first)
to F-CE# or F-WE# going low (whichever goes low first).
Hence, t
WPH
= t
WHWL
= t
EHEL
= t
WHEL
= t
EHWL
.
See Figure 4, Input/Output Reference Waveformfor timing measurements and maximum allowable input slew rate.
See Figure 7, AC Waveform: Flash Program and Erase Operations.
5.
6.
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