參數(shù)資料
型號(hào)： Z87200
廠商： ZILOG INC
元件分類(lèi)： 通信及網(wǎng)絡(luò)
英文描述： CAP 0.047UF 100V 10% X7R AXIAL TR-14
中文描述： SPECIALTY TELECOM CIRCUIT, PQFP100
封裝： PLASTIC, QFP-100
文件頁(yè)數(shù)： 28/54頁(yè)
文件大?。?/td> 449K
代理商： Z87200
Z87200
Spread-Spectrum Transceiver
Zilog
4-28
DS96WRL0400
CONTROL REGISTERS
Setting the Control Registers
The majority of the Z87200 control registers are complete-
ly independent and can be set or modified in any order.
Two exceptions, however, exist:
I
First, any time that the NCO is disabled, either through
use of pin MNCOEN or bit 0 of address 37
H
, the
frequency control word must be reloaded, either through
use of pin MFLD or bit 0 of address 00
H
, once the NCO
is re-enabled.
I
Second, setting bit 2 of address 37
H
to zero to disable
the receiver will also cause the data in address 38
H
to be
set to zero, thereby possibly changing the receiver test
point(s) that will be observed on the RXTEST pins.
Address 38
H
must be loaded with its desired value after
bit 2 of address 37
H
is again set to 1.
Downconverter Registers
Address 00
H
:
Bit 0 — Frequency Control Word Load
This bit is used to load a frequency control value into the
NCO, thereby changing its output frequency. The signal is
internally synchronized to RXIFCLK to avoid intrinsic race
or hazard timing conditions.
The loading of the NCO may be performed by various
means. Setting this bit provides a synchronized internal
means to control update of the NCO. Alternatively, the
MFLD pin or the Z87200’s programmable loop filter timing
circuitry may be used.
The MFLD input and bit 0 of address 00
H
are logically
ORed together so that, when either one is held low, a rising
edge on the other triggers the frequency load function
manually. The rising edge of this bit is synchronized inter-
nally so that, on the following sixth rising edge of RXIF-
CLK, the frequency control word is completely registered
into the NCO accumulator. The frequency load command
must not be repeated until after a delay of six RXIFCLK cy-
cles.
Address 01
H
:
Bit 0 — Manual Sample Clock Enable
This bit selects the source of the internal baseband sam-
pling clock, which should be at twice the nominal PN chip
rate. The clock reference may be either supplied externally
by RXMSMPL or generated internally from RXIFCLK.
When this bit is set high, the baseband sampling rate of the
receiver is controlled by the external RXMSMPL signal.
When it is set low, the sampling clock is generated inter-
nally (at a rate determined by the Sample Rate Control
counter and set by bits 5-0 of address 02
H
) and the
RXMSMPL input is ignored.
Bit 1 — Invert Loop Filter Value
This bit allows the sign of the output signal from the loop
filter to be inverted, thereby negating the value of the sig-
nal. The capability to invert the loop filter value permits the
carrier frequency error component generated in the de-
modulator to be either added to or subtracted from the Fre-
quency Control Word of the NCO. The correct setting will
depend on several factors, including whether high-side or
low-side downconversion is used.
When this bit is set low, the loop filter output is negated be-
fore being summed with the Frequency Control Word of
the NCO and is thus subtracted from the FCW; when this
bit is set high, the loop filter output is not negated and is
added to the FCW.
Bit 2 — NCO Accumulator Carry In
This bit is primarily used as an internal test function and
should be set low for normal operation. When this bit is set
high, 1 LSB is added to the NCO accumulator each clock
cycle. When it is set low, the NCO accumulator is not af-
fected.
Bit 3 — Two’s Complement Input
The RXIIN
7-0
and RXQIN
7-0
input signals can be in either
two’s complement or offset binary formats. Since all inter-
nal processing in the device operates with two’s comple-
ment format signals, it is necessary to convert the RXIIN
7-
0
and RXQIN
7-0
inputs in offset binary format to two’s com-
plement format by inverting the MSBs.
When this bit is set high, the device expects two’s comple-
ment format inputs on RXIIN
7-0
and RXQIN
7-0
. When it is
set low, the device expects offset binary format on RXIIN
7-
0
and RXQIN
7-0
. In two’s complement format, the 8-bit in-
put values range from –128 to +127 (80
H
to 7F
H
); in offset
binary format, the values range from 0 to +255 (00
H
to
FF
H
).
相關(guān)PDF資料
PDF描述
ZA3020 2A STEP DOWN PWM SWITCH MODE DC DC REGULATORS
ZA3020DS 2A STEP DOWN PWM SWITCH MODE DC DC REGULATORS
ZC0302 VGA & CIF USB PC Camera Controller
ZCN0545A N-CHANNEL ENHANCEMENT MODE VERTICAL IGBT
ZD2.4-CL2-R Low Current Operation at 250 ，Low Reverse Leakage,Low Noise Zener Diode
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
Z8720020FSC 功能描述:IC SS MODEM 100-QFP RoHS:否 類(lèi)別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器，接收器，收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:1,140 系列:AU 類(lèi)型:收發(fā)器 驅(qū)動(dòng)器/接收器數(shù):1/1 規(guī)程:CAN 電源電壓:5.3 V ~ 27 V 安裝類(lèi)型:表面貼裝 封裝/外殼:14-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:14-SO 包裝:管件 其它名稱(chēng):935267940512AU5790D14AU5790D14-ND
Z8720020FSC00TR 功能描述:IC SS TXRX MODEM 100QFP RoHS:否 類(lèi)別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器，接收器，收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:1,140 系列:AU 類(lèi)型:收發(fā)器 驅(qū)動(dòng)器/接收器數(shù):1/1 規(guī)程:CAN 電源電壓:5.3 V ~ 27 V 安裝類(lèi)型:表面貼裝 封裝/外殼:14-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:14-SO 包裝:管件 其它名稱(chēng):935267940512AU5790D14AU5790D14-ND
Z8720020FSG 功能描述:IC SS MODEM 100-QFP RoHS:是 類(lèi)別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器，接收器，收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:1,140 系列:AU 類(lèi)型:收發(fā)器 驅(qū)動(dòng)器/接收器數(shù):1/1 規(guī)程:CAN 電源電壓:5.3 V ~ 27 V 安裝類(lèi)型:表面貼裝 封裝/外殼:14-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:14-SO 包裝:管件 其它名稱(chēng):935267940512AU5790D14AU5790D14-ND
Z8720045FSC 功能描述:射頻收發(fā)器 SS MODEM RoHS:否 制造商:Atmel 頻率范圍:2322 MHz to 2527 MHz 最大數(shù)據(jù)速率:2000 Kbps 調(diào)制格式:OQPSK 輸出功率:4 dBm 類(lèi)型: 工作電源電壓:1.8 V to 3.6 V 最大工作溫度:+ 85 C 接口類(lèi)型:SPI 封裝 / 箱體:QFN-32 封裝:Tray
Z8720045FSC00TR 功能描述:IC SS TXRX MODEM 45MHZ 100QFP RoHS:否 類(lèi)別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器，接收器，收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:1,140 系列:AU 類(lèi)型:收發(fā)器 驅(qū)動(dòng)器/接收器數(shù):1/1 規(guī)程:CAN 電源電壓:5.3 V ~ 27 V 安裝類(lèi)型:表面貼裝 封裝/外殼:14-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:14-SO 包裝:管件 其它名稱(chēng):935267940512AU5790D14AU5790D14-ND
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*