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參數(shù)資料
| 型號： | Z87200 |
| 廠商： | ZILOG INC |
| 元件分類： | 通信及網(wǎng)絡 |
| 英文描述： | CAP 0.047UF 100V 10% X7R AXIAL TR-14 |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQFP100 |
| 封裝： | PLASTIC, QFP-100 |
| 文件頁數(shù)： | 19/54頁 |
| 文件大?。?/td> | 449K |
| 代理商： | Z87200 |
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Z87200
Zilog
Spread-Spectrum Transceiver
DS96WRL0400
4-19
4
To detect this maximum correlation in each symbol period,
the signal power value is compared against a 10-bit user-
programmable threshold value. A symbol clock pulse is
generated each time the power value exceeds the thresh-
old value to indicate a symbol detect. Since the Acquisi-
tion/Preamble symbol and subsequent data symbols can
have different PN codes with different peak correlation val-
ues (which depend on the PN code length and code prop-
erties), the Z87200 is equipped with two separate thresh-
old registers to store the Acquisition/Preamble Threshold
value (stored in addresses 29
H
and 2A
H
) and the Data
Symbol Threshold value (stored in addresses 2B
H
and
2C
H
). The device will automatically use the appropriate
value depending on whether it is in acquisition mode or
not.
Since spread-spectrum receivers are frequently designed
to operate under extremely adverse signal-to-noise ratio
conditions, the Z87200 is equipped with a “flywheel circuit”
to enhance the operation of the symbol tracking function
by introducing memory to the PN Matched Filter operation.
This circuit is designed to ignore false detects at inappro-
priate times in each symbol period and to insert a symbol
clock pulse at the appropriate time if the symbol detection
is missed. The flywheel circuit operates by its a priori
knowledge of when the next detect pulse is expected. A
priori the expected pulse will occur one symbol period af-
ter the last correctly detected one, and a window of
±
1
baseband sample time is therefore used to gate the detect
pulse. Any detects generated outside this time window are
ignored, while a symbol detect pulse will be inserted into
the symbol clock stream if the power level does not exceed
the threshold within the window, corresponding to a
missed detect. An inserted symbol detect signal will be
generated precisely one symbol after the last valid detect,
the nominal symbol length being determined by the value
of Rx Chips Per Data Symbol stored in address 2D
H
.
The cross-correlation characteristics of a noisy received
signal with the noise-free local PN code used in the
Z87200’s PN Matched Filter may result in “smearing” of
the peak power value over adjacent chip periods. Such
smearing can result in two or three consecutive power val-
ues (typically, the on-time and one-sample early and late
values) exceeding the threshold. A maximum power selec-
tor circuit is incorporated in the Z87200 to choose the high-
est of any three consecutive power levels each time this
occurs, thereby enhancing the probability that the optimum
symbol timing will be chosen in such cases. If desired, this
function can be disabled by setting bit 3 of address 30
H
high.
The Z87200 also includes a circuit to keep track of missed
detects; that is, those cases where no peak power level ex-
ceeds the set threshold. An excessively high rate of
missed detects is an indication of poor signal quality and
can be used to abort the reception of a burst of data. The
number of symbols expected in each receive burst, up to a
maximum of 65,533, is stored in addresses 2E
H
and 30
H
.
A counter is used to count the number of missed detects in
each burst, and the system can be configured to automat-
ically abort a burst and return to acquisition mode if this
number exceeds the Missed Detects per Burst Threshold
value stored in address 2F
H
. Under normal operating con-
ditions, the Z87200 will automatically return to acquisition
mode when the number of symbols processed in the burst
is equal to the value of the data stored in address 2E
H
and
30
H
. To permit the processing of longer bursts or continu-
ous data, this function can be disabled by setting bit 6 of
address 30
H
high.
Differential Demodulator
Both DPSK demodulation and carrier discrimination are
supported in the Z87200 receiver by the calculation of
“Dot” and “Cross” products using the despread I and Q
channel information generated by the PN Matched Filter
for the current and previous symbols. A block diagram of
the DPSK Demodulator’s I and Q channel processing is
shown in Let I
k
and Q
k
represent the I and Q channel out-
puts, respectively, for the k
th
symbol. The Dot and Cross
products can then be defined as:
Dot(k)
= I
k
I
k-1
+ Q
k
Q
k-1
; and,
Cross(k) = Q
k
I
k-1
- I
k
Q
k-1
.
Examination of these products in the complex plane re-
veals that the Dot and Cross products are the real and
imaginary results, respectively, of complex multiplication
of the current and previous symbols. The Dot product
alone thus allows determination of the phase shift between
successive BPSK symbols, while the Dot and Cross prod-
ucts together allow determination of the integer number of
π
/2 phase shifts between successive QPSK symbols. Dif-
ferential encoding of the source data implies that an abso-
lute phase reference is not required, and thus knowledge
of the phase shift between successive symbols derived
from the Dot and Cross products unambiguously permits
correct demodulation.
Implementation of this approach is simplified if the polari-
ties (the signs) alone of the Dot and Cross products pro-
vide the information required to make the correct symbol
decision. For BPSK and
π
/4 QPSK signals, no modifica-
tions are needed: in BPSK, the sign of the Dot product fully
captures the signal constellation, while, in
π
/4 QPSK, the
signal constellation intrinsically includes the phase rotation
needed to align the decision boundaries with the four pos-
sible combinations of the Dot and Cross product polarities.
For QPSK signals, a fixed phase rotation of
π
/4 (45
°
) is in-
troduced in the DPSK Demodulator to the previous symbol
to simplify the decision algorithm. Rotation of the previous
symbol is controlled by the settings of bits 0 and 1 of ad-
dress 33
H
, allowing the previous symbol to be rotated by
0
°
or
±
45
°
. As noted, for BPSK or
π
/4 QPSK signals, a ro-
tation of 0
°
should be programmed, but, for QPSK signals,
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