TABLE 77:
參數(shù)資料
型號(hào)： XRT72L71IQ
廠商： Exar Corporation
文件頁(yè)數(shù)： 82/102頁(yè)
文件大?。?/td> 0K
描述： IC FRAMER DS3 ATM UNI 160PQFP
產(chǎn)品變化通告： XRT72Lx Series Obsolescence 02/May/2012
標(biāo)準(zhǔn)包裝： 24
控制器類型： DS3 ATM UNI，透明通道調(diào)幀器
電源電壓： 3.3V
電流 - 電源： 120mA
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 160-BQFP
供應(yīng)商設(shè)備封裝： 160-PQFP（28x28）
包裝： 托盤
XRT72L71
á
DS3 ATM UNI/CLEAR CHANNEL FRAMER
REV. 1.1.0
76
TABLE 77: RX CP CONFIGURATION REGISTER
REGISTER 76
RX CP CONFIGURATION REGISTER
HEX ADDRESS: 0X4C
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7Rx LCD
RO
1
0: Indicates that the Receive Cell Processor currently has cell delineation
within the incoming stream of ATM cells.
1: Indicates that the Receive Cell Processor is currently declaring a “Loss of
Cell Delineation”.
NOTE: This bit-field is only active if the XRT72L71 is operating in the “ATM
UNI” Mode.
6
RDP Chk Pat
R/W
0
0: Receive Cell Processor will insert an alternating “Data Path Integrity
Check” value of 0x55 and 0xAA into the 5th octet position of each cell, writ-
ten into the RxFIFO
1: Receive Cell Processor will insert a fixed “Data Path Integrity Check” value
of 0x55 into the 5th octet position of each cell, written into the RxFIFO.
NOTE: This bit-field is only active if the XRT72L71 is operating in the “ATM
UNI” Mode.
5
RDP Chk Pat En
R/W
0
0: “Data Path Integrity Check” value is not written into ATM cells. ATM cells
(with their received HEC byte value) are passed on into RxFIFO without
modification.
1:”Data Path Integrity Check” value of 0x55 and 0xAA into the 5th octet posi-
tion of each cell, is written into each ATM cell, which is routed to the
“RxFIFO.
NOTE: This bit-field is only active if the XRT72L71 is operating in the “ATM
UNI” Mode.
4
IC Discard
R/W
1
0: Idle cells are NOT discarded by the Receive Cell Processor block
1: Idle cells are automatically discarded by the Receive Cell Processor block.
NOTE: This bit-field is only active if the XRT72L71 is operating in the “ATM
UNI” Mode.
3
SegOAM Pass Through
R/W
1
0: Segment-Type OAM cells are not written into RxFIFO.
1: Segment-Type OAM cells are passed to receiver FIFO
NOTE: This bit-field is only active if the XRT72L71 is operating in the “ATM
UNI” Mode.
2
De-Scramble Enable
R/W
1
0: Disables cell payload de-scrambling
1: Enables cell payload de-scrambling
NOTE: This bit-field is only active if the XRT72L71 is operating in the “ATM
UNI” Mode.
1
Rx Coset Enable
R/W
1
0: Coset polynomial is not added to the HEC byte of each “incoming” ATM
cell.
1: Coset polynomial is added to HEC byte of each “incoming” ATM Cell. The
Receive Cell Processor needs to account for the Coset polynomial during
HEC byte verification.
NOTE: This bit-field is only active if the XRT72L71 is operating in the “ATM
UNI” Mode.
0
HEC Error Ignore
R/W
0
0: Discards/drops cells with HEC byte errors.
1: Retains cells with HEC byte errors, for further processing.
NOTE: This bit-field is only active if the XRT72L71 is operating in the “ATM
UNI” Mode.
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