參數(shù)資料
型號(hào): XRT72L71IQ
廠商: Exar Corporation
文件頁數(shù): 6/102頁
文件大?。?/td> 0K
描述: IC FRAMER DS3 ATM UNI 160PQFP
產(chǎn)品變化通告: XRT72Lx Series Obsolescence 02/May/2012
標(biāo)準(zhǔn)包裝: 24
控制器類型: DS3 ATM UNI,透明通道調(diào)幀器
電源電壓: 3.3V
電流 - 電源: 120mA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 160-BQFP
供應(yīng)商設(shè)備封裝: 160-PQFP(28x28)
包裝: 托盤
á
XRT72L71
DS3 ATM UNI/CLEAR CHANNEL FRAMER
REV. 1.1.0
7
24
TxLev
O
Transmit Line Build Enable/Disable Select (to be connected to the TxLev
input pin of the XRT7300 E3/DS3/STS-1 LIU IC): This output pin is intended
to be connected to the TxLev input pin of the XRT7300 E3/DS3/STS-1 LIU IC.
The user can control the state of this output pin by writing a “0” or a “1” to Bit 2
(TxLev) within the Line Interface Driver Register (Address = 0x72).
If the user commands this signal to toggle “High” then it will disable the “Trans-
mit Line Build-Out” circuitry within the XRT7300. In this case, the XRT7300
will output unshaped (square-wave) pulses onto the “Transmit Line Signal”. In
order to insure that the XRT7300 generates a line signal that is compliant with
the Bellcore GR-499-CORE Pulse Template requirements (at the DSX-3
Cross-Connect), the user is advised to set this output pin “High”, if the cable
length (between the Transmit Output of the XRT7300 and the DSX-3 Cross-
Connect) is greater than 225 feet.
Conversely, if the user commands this signal to toggle “High”, then it will
enable the “Transmit Line Build-Out” circuitry within the XRT7300. In this case,
the XRT7300 will output shaped pulses onto the “Transmit Line Signal”. In
order to ensure that the XRT7300 generates a line signal that is compliant
with the Bellcore GR-499-CORE Pulse Template requirements (at the DSX-3
Cross-Connect), the user is advised to set this output pin “Low”, if the cable
length (between the Transmit Output of the XRT7300 and the DSX-3 Cross
Connect) is less than 225 ft. of cable.
Writing a “1” to Bit 2 of the Line Interface Drive Register (Address = 0x72) will
cause this output pin to toggle “High”. Writing a “0” to this bit-field will cause
this output pin to toggle “Low”.
NOTE: If the customer is not using the XRT7300 DS3/E3/STS-1 LIU IC, then
this output pin can be used for other purposes.
25
D1
I/O
Bi-Directional Data bus (Microprocessor Interface Section):
Please see description for D15, pin1.
26
RLOOP
O
Remote Loop-back Output Pin (to the XRT7300 DS3/E3/STS-1 LIU IC):
This output pin is intended to be connected to the RLOOP input pin of the
XRT7300 LIU IC. This output pin, along with the LLOOP input pin (pin 28) per-
mits the user to configure the XRT7300 to operate in either of the following three
(3) loop-back modes.
Analog Local Loop-back Mode
Digital Local Loop-back Mode
Remote Loop-back Mode.
Writing a “1” to bit 1 of the “Line Interface Drive Register (Address = 0x72) will
cause this output pin to toggle “High”. Writing a “0” to this bit-field will cause
the RLOOP output to toggle “Low”.
NOTE: If the customer is not using the XRT7300 DS3/E3/STS-1 IC, then this
output pin can be used for other purposes.
27
D0
I/O
Bi-Directional Data bus (Microprocessor Interface Section):
Please see description for D15, pin1.
PIN DESCRIPTION (CONTINUED)
PIN NO.
SYMBOL
TYPE
DESCRIPTION
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