TABLE 1: UNI O
參數(shù)資料
型號： XRT72L71IQ
廠商： Exar Corporation
文件頁數(shù)： 49/102頁
文件大?。?/td> 0K
描述： IC FRAMER DS3 ATM UNI 160PQFP
產(chǎn)品變化通告： XRT72Lx Series Obsolescence 02/May/2012
標(biāo)準(zhǔn)包裝： 24
控制器類型： DS3 ATM UNI，透明通道調(diào)幀器
電源電壓： 3.3V
電流 - 電源： 120mA
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 160-BQFP
供應(yīng)商設(shè)備封裝： 160-PQFP（28x28）
包裝： 托盤
XRT72L71
á
DS3 ATM UNI/CLEAR CHANNEL FRAMER
REV. 1.1.0
46
TABLE 1: UNI OPERATING MODE REGISTER
REGISTER 0
UNI OPERATING MODE REGISTER
HEX ADDRESS: 0X00
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7
Local Loop-back
R/W
0
0: Local Loop-back Mode operation is disabled
1: Local Loop-back Mode operation is enabled. The Transmit stream on TxPOS,
TxNEG pins are looped back into the receive RxPOS, RxNEG pins
6
Cell Loop-back
R/W
0
0: Cell Loop-back Mode operation is disabled
1: Cell Loop-back Mode operation is enabled. Cells from the Receive Cell Pro-
cessor block are written into the Tx FIFO.
NOTE: This bit-field is only active if the XRT72L71 is operating in the ATM UNI
Mode.
5
PLCP Loop-back
R/W
0
0: PLCP Loop-back Mode operation is disabled
1: PLCP Loop-back Mode operation is enabled. PLCP frames are looped from
the Transmit PLCP Processor block into the Receive PLCP Processor Block.
NOTE: This bit-field is only active if the XRT72L71 is operating in the ATM UNI/
PLCP Mode.
4
RESET
R/W
0
0: Normal Operation
1: A “0” to “1” transition causes a reset of the UNI/Framer device.
3
Direct-mapped ATM
R/W
1
0: PLCP Mode is enabled. Transmit and Receive PLCP Processor blocks are
enabled.
1: Direct-Mapped ATM Mode. Transmit and Receive PLCP Processor blocks are
disabled.
NOTE: This bit-field is only active if the XRT72L71 is operating in the ATM UNI
Mode.
2
C-BIT/M13
R/W
0
0: XRT72L71 will support the “DS3/C-Bit Parity” Framing Format.
1: XRT72L71 will support the “DS3/M13” Framing Format.
1
Timing Reference
Select (1)
R/W
1
PLCP block
00: Transmitter timings taken from the Receive PLCP Processor (Loop-Timing).
01: 8 kHz reference signal on 8kRef pin used for stuffing and framing
10: StuffCtl is used for stuffing control, framing is asynchronous on power on
11: Fixed stuffing pattern is used. Framing is asynchronous on power on
Framer block
00: Transmitter timings are taken from the Receive DS3 Framer (Loop-Timing)
01: Framing is asynchronous on power-on, and TxInClk is used as the transmit
clock
10: Transmitter follows external pin (TxFrameRef) framing reference
11: Framin is asynchronous on power-on, and TxInClk is used as the transmit
clock
0
Timing Reference
Select (0)
R/W
1
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XRT72L71IQ-F 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Single CH DS3 UNI (3.3V) RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
XRT72L73IB 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC
XRT72L74IB 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC
XRT7300 制造商:EXAR 制造商全稱:EXAR 功能描述:E3/DS3/STS-1 LINE INTERFACE UNIT
XRT7300ES 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
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