XRT72L71
á
DS3 ATM UNI/CLEAR CHANNEL FRAMER
REV. 1.1.0
52
TABLE 13: TEST CELL ERROR ACCUMULATOR - MSB
REGISTER 12
TEST CELL ERROR ACCUMULATOR - MSB
HEX ADDRESS: 0X0C
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7-0
TEST CELL ERROR -
MSB
RUR
0x00
Test Cell Accumulator register - MSB
This register, along with “TEST CELL ERROR - LSB” contains the number of
bit errors accumulated since the last read of these registers. This particular
register contains the “Most Significant Byte” value of the total number of Test
Cell Errors.
NOTE: This register is only active if the XRT72L71 has been configured to
operate in the “ATM UNI” Mode.
TABLE 14: TEST CELL ERROR ACCUMULATOR - LSB
REGISTER 13
TEST CELL ERROR ACCUMULATOR - LSB
HEX ADDRESS: 0X0D
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7-0
TEST CELL ERROR - LSB
RUR
0x00
Test Cell Accumulator register - LSB
This register, along with “TEST CELL ERROR - MSB” contains the number of
bit errors accumulated since the last read of these registers. This particular
register contains the “Least Significant Byte” value of the total number of Test
Cell Errors.
NOTE: This register is only active if the XRT72L71 has been configured to
operate in the “ATM UNI” Mode.