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XRT72L71
DS3 ATM UNI/CLEAR CHANNEL FRAMER
REV. 1.1.0
75
TABLE 75: TX PLCP BIP-8 ERROR MASK
REGISTER 74
TX PLCP BIP-8 ERROR MASK
HEX ADDRESS: 0X4A
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7-0
B1 Error Mask
R/W
0x00
The Transmit PLCP Processor block always XORs contents of this register
with the contents of the B1 byte (within a PLCP frame). This “XORed” value
is then written back into the “B1” byte field, within each “outbound” PLCP
Frame; prior to transmission. Setting any of these bit-fields to “1” introduces
error in that specific bit, within each “outbound” B1 byte.
Register must be set to 0x00 for normal operation,
NOTE: This bit-field is only active if the XRT72L71 is operating in both the
“ATM UNI” and the “PLCP” Modes.
TABLE 76: TX PLCP G1 BYTE REGISTER
REGISTER 75
TX PLCP G1 BYTE REGISTER
HEX ADDRESS: 0X4B
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7-5
Unused
RO
0
4
Tx PLCP FEBE Mask
R/W
0
0: FEBE Count is transmitted, based upon B1 Byte Error conditions, as
detected by the Receive PLCP Processor.
1: FEBE is transmitted as 0000
NOTE: This bit-field is only active if the XRT72L71 is operating in both the
“ATM UNI” and the “PLCP” Modes.
3
Force PLCP Yellow Alarm
R/W
0
0: PLCP Yellow Alarm generated from Receive PLCP Processor.
1: PLCP Yellow Alarm is Forced.
NOTE: This bit-field is only active if the XRT72L71 is operating in both the
“ATM UNI” and the “PLCP” Modes.
2
LSS(2)
R/W
0
Link Status Signal may be programmed by user
1
LSS(1)
R/W
0
LSS(0)
R/W
0