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參數(shù)資料
| 型號： | STPCI2EEYC |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 外設(shè)及接口 |
| 英文描述： | MULTIFUNCTION PERIPHERAL, PBGA516 |
| 封裝： | PLASTIC, BGA-516 |
| 文件頁數(shù)： | 9/80頁 |
| 文件大?。?/td> | 854K |
| 代理商： | STPCI2EEYC |
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STRAP OPTION
17/80
Issue 0.4 - July 16, 2001
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
2.1.4. STRAP REGISTER 2
.
STRAP2
Access = 0022h/0023h
Regoffset =04Ch
7
6543210
MD[53]
MD[52]
Rsv
MD[20]
MD[19]
MD[18]
MD[51]
MD[50]
This register defaults to the values sampled on the MD pins after reset
Bit Number Sampled
Mnemonic
Description
Bit 7
MD[53]
This bit reflects the value sampled on MD[53] pin and deter-
mines whether the internal Parallel Port Controller is used
0: Internal Parallel Port Controller is disabled
1: Internal Parallel Port Controller is enabled
Bit 6
MD[52]
This bit reflects the value sampled on MD[52] pin and deter-
mines whether the internal Keyboard controller is used
0: Internal Keyboard Controller is disabled
1: Internal Keyboard Controller is enabled
Bit 5
Rsv
Reserved
Bit 4
MD[20]
This bit reflects the value sampled on MD[20] pin and controls
the Dot clock (DCLK) source as follows:
0: Input
1: Output.
DCLK pin is an output and is connected to the internal
frequency synthesizer output.
Bit 3
MD[19]
This bit reflects the value sampled on MD[19] pin and controls
the Memory clock output (MCLKO) source as follows:
0: External. MCLKO pin is tristated.
1: Internal. MCLKO pin is an output and is connected to the internal fre-
quency synthesizer output.
Bit 2
MD[18]
This bit reflects the value sampled on MD[18] pin and controls
the Host/CPU clock source as follows:
0: External. HCLK pin is an input.
1: Internal. HCLK pin is an output and is connected to the internal fre-
quency synthesizer output
Bit 1
MD[51]
This bit reflects the value sampled on MD[51] pin and deter-
mines whether the internal UART1 is enabled:
0: Internal UART1 is disabled
1: Internal UART1 is enabled
Bit 0
MD[50]
This bit reflects the value sampled on MD[50] pin and deter-
mines whether the internal UART2 is enabled:
0: Internal UART2 is disabled
1: Internal UART2 is enabled
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| STPCI2GDY | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:X86 Core PC Compatible System-on-Chip for Terminals |
| STPCI2GDYI | 功能描述:微處理器 - MPU 120MHz x86 SoC RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| STPCI2GDYIE | 制造商:STMicroelectronics 功能描述: |
| STPCI2HDYC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PERIPHERAL (MULTIFUNCTION) CONTROLLER |
| STPCI2HEYC | 功能描述:微處理器 - MPU 133MHz x86 SoC RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
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