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參數(shù)資料
| 型號(hào)： | STPCI2EEYC |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 外設(shè)及接口 |
| 英文描述： | MULTIFUNCTION PERIPHERAL, PBGA516 |
| 封裝： | PLASTIC, BGA-516 |
| 文件頁數(shù)： | 12/80頁 |
| 文件大?。?/td> | 854K |
| 代理商： | STPCI2EEYC |
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DESCRIPTION
Issue 0.4 - July 16, 2001
2/80
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
DESCRIPTION
The STPC Atlas integrates a standard 5th genera-
tion x86 core along with a powerful UMA graphics/
video chipset, support logic including PCI, ISA,
Local Bus, USB, UIDE controllers and combines
them with standard I/O interfaces to provide a sin-
gle PC compatible subsystem on a single device,
suitable for all kinds of terminal and industrial ap-
pliances.
s
X86 Processor core
s
Fully static 32-bit 5-stage pipeline, x86
processor fully PC compatible.
s
Can access up to 4GB of external memory.
s
8Kbyte unified instruction and data cache
with write back and write through capability.
s
Parallel processing integral floating point unit,
with automatic power down.
s
Runs up to 100MHz (X1) or 133 MHz (X2).
s
Fully static design for dynamic clock control.
s
Low power and system management modes.
s
Optimized design for 2.5V operation.
s
SDRAM Controller
s
64-bit data bus.
s
Up to 100MHz SDRAM clock speed.
s
Integrated system memory, graphic frame
memory and video frame memory.
s
Supports 8MB up to 128 MB system memory.
s
Supports 16-Mbit, 64-Mbit and 128-Mbit
SDRAMs.
s
Supports 8, 16, 32, 64, and 128 MB DIMMs.
s
Supports buffered, non buffered, and
registered DIMMs
s
4-line write buffers for CPU to DRAM and PCI
to DRAM cycles.
s
4-line read prefetch buffers for PCI masters.
s
Programmable latency
s
Programmable timing for SDRAM
parameters.
s
Supports -8, -10, -12, -13, -15 memory parts
s
Supports memory hole between 1MB and
8MB for PCI/ISA busses.
s
32-bit access, Autoprecharge & Power-down
are not supported.
s
Enhanced 2D Graphics Controller
s
Supports pixel depths of 8, 16, 24 and 32 bit.
s
Full BitBLT implementation for all 256 raster
operations defined for Windows.
s
Supports 4 transparent BLT modes - Bitmap
Transparency, Pattern Transparency, Source
Transparency and Destination Transparency.
s
Hardware clipping
s
Fast line draw engine with anti-aliasing.
s
Fast triangle fill engine.
s
Supports 4-bit alpha blended font for anti-
aliased text display.
s
Complete double buffered registers for
pipelined operation.
s
64-bit wide pipelined architecture running at
100 MHz. Hardware clipping
s
CRT Controller
s
Integrated 135MHz triple RAMDAC allowing
for 1280 x 1024 x 75Hz display.
s
8-, 16-, 24-bit pixels.
s
Interlaced or non-interlaced output.
s
Video Input port
s
Accepts video inputs in CCIR 601/656 mode.
s
Optional 2:1 decimator
s
Stores captured video in off setting area of
the onboard frame buffer.
s
HSYNC and B/T generation or lock onto
external video timing source.
s
Video Pipeline
s
Two-tap interpolative horizontal filter.
s
Two-tap interpolative vertical filter.
s
Color space conversion (RGB to YUV and
YUV to RGB).
s
Programmable window size.
s
Chroma and color keying for integrated video
overlay.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| STPCI2GDY | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:X86 Core PC Compatible System-on-Chip for Terminals |
| STPCI2GDYI | 功能描述:微處理器 - MPU 120MHz x86 SoC RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| STPCI2GDYIE | 制造商:STMicroelectronics 功能描述: |
| STPCI2HDYC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PERIPHERAL (MULTIFUNCTION) CONTROLLER |
| STPCI2HEYC | 功能描述:微處理器 - MPU 133MHz x86 SoC RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
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