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參數(shù)資料
| 型號： | STPCI2EEYC |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 外設(shè)及接口 |
| 英文描述： | MULTIFUNCTION PERIPHERAL, PBGA516 |
| 封裝： | PLASTIC, BGA-516 |
| 文件頁數(shù)： | 55/80頁 |
| 文件大?。?/td> | 854K |
| 代理商： | STPCI2EEYC |
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BOARD LAYOUT
59/80
Issue 0.4 - July 16, 2001
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
A local ground plane on opposite sides of the
board, as shown in Figure 5-6, improves thermal
dissipation. It is used to connect decoupling ca-
pacitances but it can also be used for connection
to a heat sink or to the system metal box for better
dissipation.The possibility of using the whole sys-
tem box for thermal dissipation is very useful in
cases of high internal temperatures and low out-
side temperatures. Both sides of the PBGA should
be thermally connected to the metal chassis in or-
der to propagate the heat flow through the metal.
Figure 5-7 illustrates such an implementation.
The routing to the 2.5 V and 3.3 V supply balls is
shown in Figure 5-8.
5.2 High Speed Signals
Some STPC Interfaces run at high speed and
need to be carefully routed or even shielded.
Such interfaces are listed below, in decreasing
speed order:
1) Memory Interface
2) Graphics and video interfaces
3) PCI bus
4) 14 MHz oscillator stage
All clock signals have to be routed first and shield-
ed for speeds of 27MHz or higher. The high speed
signals follow the same constraints, as for the
memory and PCI control signals.
The next interfaces to be routed are Memory, Vid-
eo/graphics and PCI.
All the analog noise-sensitive signals have to be
routed in a separate area and hence can be rout-
ed indepedently.
5.3 Memory Interface
5.3.1 Introduction
In order to achieve SDRAM memory interfaces
which work at clock frequencies of 100 MHz and
above, careful consideration has to be given to the
timing of the interface with all the various electrical
and physical constraints taken into consideration.
The guidelines described below are related to
SDRAM components on DIMM modules. For ap-
plications where the memories are directly sol-
dered to the motherboard, the PCB should be laid
out such that the trace lengths fit within the con-
straints shown here. The traces could be slightly
longer since the extra routing on the DIMM PCB is
no longer present but it is then up to the user to
verify the timings.
5.3.2 SDRAM Clocking Scheme
The SDRAM Clocking Scheme deserves a special
mention here. Basically the memory clock is gen-
erated on-chip through a PLL and goes directly to
the MCLKO output pin of the STPC. The nominal
frequency is 100 MHz. Because of the high load
presented to the MCLK on the board by the
DIMMs it is recommended to rebuffer the MCLKO
signal on the board and balance the skew to the
clock ports of the different DIMMs and the MCLKI
input pin of STPC.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| STPCI2GDY | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:X86 Core PC Compatible System-on-Chip for Terminals |
| STPCI2GDYI | 功能描述:微處理器 - MPU 120MHz x86 SoC RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| STPCI2GDYIE | 制造商:STMicroelectronics 功能描述: |
| STPCI2HDYC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PERIPHERAL (MULTIFUNCTION) CONTROLLER |
| STPCI2HEYC | 功能描述:微處理器 - MPU 133MHz x86 SoC RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
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