參數(shù)資料
型號(hào): STPCI2EEYC
廠商: STMICROELECTRONICS
元件分類(lèi): 外設(shè)及接口
英文描述: MULTIFUNCTION PERIPHERAL, PBGA516
封裝: PLASTIC, BGA-516
文件頁(yè)數(shù): 28/80頁(yè)
文件大小: 854K
代理商: STPCI2EEYC
PIN DESCRIPTION
Issue 0.4 - July 16, 2001
34/80
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
3.1. SIGNAL DETAIL
The muxing between ISA, LOCAL BUS and PCM-
CIA is performed by external strap options.
The resulting interface is then dynamically muxed
with the IDE Interface.
Table 3-4. Multiplexed Signals (on the same pin)
ISA Pin Name
IDE Pin Name
Local Bus Pin Name
PCMCIA Pin Names
RTCAS, DEV_CLOCK
FCS0#, FCS1#
SA[19:8]
DD[11:0]
A[19:8]
SA[7:0]
PA[7:4], PRDY, IOCS#[2:0]
A[7:0]
SD[15:0]
PD[15:0]
D[15:0]
LA[23:20]
SCS3#,SCS1#,
PCS3#,PCS1#
A[23:20]
LA[19:17]
DA[2:0]
Not used,A[25:24]
IOCHRDY
DIORDY
RMRTCCS#
DD[15]
RTCRW#, RTCDS
DD[13:12]
KBCS
DD[14]
BHE#
PA[17]
OE#
ALE
PA[15]
AEN
PA[16]
WAIT#
MEMR#, MEMW#
PA[14], PA[18]
SMEMR#
PA[19]
VCC3_EN
SMEMW#
PBE#[1]
VPP_PGM
IOR#, IOW#
PA[13], PA[12]
IORD#, IOWR#
MASTER#
PRD#
BVD1
MCS16#
PWR#
IOCS16#
PBE#[0]
WP/IOIS 16#
REF#
PA[11]
RESET
IOCHCK#
PA[10]
BVD2
GPIOCS#
PA[9]
VCC5_EN
ZWS#
PA[8]
GPI#
ISAOE# = 0
ISAOE# = 1
IOCS#[3]
DREQ_MU#[1:0]
PA[21:20]
CE2#, CE1#
TC,DACK_ENC [2:0]
PA[3:0]
PA[23]
VPP_VCC
PA[24]
WE#
IOCS#[7]
REG#
IOCS#[6]
READY#
IOCS#[5], IOCS#[4]
CD1#, CD2#
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