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參數(shù)資料
| 型號： | STPCI2EEYC |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 外設(shè)及接口 |
| 英文描述： | MULTIFUNCTION PERIPHERAL, PBGA516 |
| 封裝： | PLASTIC, BGA-516 |
| 文件頁數(shù)： | 35/80頁 |
| 文件大?。?/td> | 854K |
| 代理商： | STPCI2EEYC |
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ELECTRICAL SPECIFICATIONS
Issue 0.4 - July 16, 2001
40/80
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
4 ELECTRICAL SPECIFICATIONS
4.1 INTRODUCTION
The electrical specifications in this chapter are
valid for the STPC Atlas.
4.2 ELECTRICAL CONNECTIONS
4.2.1 Power/Ground Connections/Decoupling
Due to the high frequency of operation of the
STPC Atlas, it is necessary to install and test this
device using standard high frequency techniques.
The high clock frequencies used in the STPC
Atlas and its output buffer circuits can cause
transient power surges when several output
buffers switch output levels simultaneously. These
effects can be minimized by filtering the DC power
leads with low-inductance decoupling capacitors,
using low impedance wiring, and by utilizing all of
the VSS and VDD pins.
4.2.2 Unused Input Pins
All inputs not used by the designer and not listed
in the table of pin connections inSection 2 should
be connected either to VDD or to VSS. Connect
active-high inputs to VDD through a 20 k
(
±10%) pull-down resistor and active-low inputs to
VSS and connect active-low inputs to VCC
through a 20 k
(±10%) pull-up resistor to prevent
spurious operation.
4.2.3 Reserved Designated Pins
Pins designated as reserved should be left dis-
connected. Connecting a reserved pin to a pull-up
resistor, pull-down resistor, or an active signal
could cause unexpected results and possible
circuit malfunctions.
4.3 ABSOLUTE MAXIMUM RATINGS
The following table lists the absolute maximum
ratings for the STPC Atlas device. Stresses
beyond those listed under Table 4-1 limits may
cause permanent damage to the device. These
are stress ratings only and do not imply that
operation under any conditions other than those
specified in section ”O(jiān)perating Conditions”.
Exposure to conditions beyond those outlined in
Table 4-1 may (1) reduce device reliability and (2)
result in premature failure even when there is no
immediately apparent sign of failure. Prolonged
exposure to conditions at or near the absolute
maximum ratings (Table 4-1) may also result in
reduced useful life and reliability.
4.3.1 5V Tolerance
The STPC is capable of running with I/O systems
that operate at 5 V such as PCI and ISA devices.
Certain pins of the STPC tolerate inputs up to
5.5 V. Above this limit the component is likely to
sustain permanent damage.
All the pins that are V5T have been denoted with a
* besides the Signal Name inTable 2-1 .
Note 1: The figures specified apply to an STPC device
that is soldered to a board, as detailed in the Board Lay-
out Section.
Table 4-1. Absolute Maximum Ratings
Symbol
Parameter
Minimum
Maximum
Units
VDDx
DC Supply Voltage
-0.3
4.0
V
VCORE
DC Supply Voltage for Core
-0.3
2.7
V
VI,VO
Digital Input and Output Voltage
-0.3
VDD + 0.3
V
V5T
5Volt Tolerance
-0.3
5.5
V
TSTG
Storage Temperature
-40
+150
°C
TOPER
Operating Temperature (Note 1)
0
+70
°C
PTOT
Maximum Power Dissipation (package)
-
4.8
W
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