參數(shù)資料
型號(hào): S82451KX
廠商: INTEL CORP
元件分類: 微控制器/微處理器
英文描述: SPECIALTY MICROPROCESSOR CIRCUIT, PQFP144
封裝: QFP-144
文件頁(yè)數(shù): 79/180頁(yè)
文件大?。?/td> 1094K
代理商: S82451KX
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)當(dāng)前第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)第162頁(yè)第163頁(yè)第164頁(yè)第165頁(yè)第166頁(yè)第167頁(yè)第168頁(yè)第169頁(yè)第170頁(yè)第171頁(yè)第172頁(yè)第173頁(yè)第174頁(yè)第175頁(yè)第176頁(yè)第177頁(yè)第178頁(yè)第179頁(yè)第180頁(yè)
PRELIMINARY
9
A
PCIset Overview
Historically, the 32 Kbyte region from C0000h–C7FFFh has contained the video BIOS located on a video card
in the ISA Expansion Area. However, in the high integration portable and desktop market video BIOS is more
likely to be located in the Extended System BIOS or System BIOS regions that start at E0000h.
The 96 Kbyte area from C8000h–DFFFFh has usually been made available to expand memory windows in
16 Kbyte blocks, depending on the requirements of other channel devices in the corresponding ISA space.
More recently, PCMCIA devices for the portable market have been assigned within this region.
This region could also be used as System Management Mode (SMM) memory.
Extended System BIOS
This 64 Kbyte region from E0000h–EFFFFh is divided into four 16 Kbyte blocks and may be mapped either to
the memory controller or the PCI bridge. This region can be programmed as disabled, read/write, write only, or
read only, providing the capability to shadow these regions in main memory. Typically, this area is used for RAM
or ROM.
System BIOS
The 64 Kbyte region from F0000h–FFFFFh is treated as a single block. After power-on reset, the PB (Compat-
ibility PB in an 450GX dual PB system) has this area R/W enabled to respond to fetches during system initial-
ization. The MC(s) and Auxiliary PBs (450GX PCIset) have this area R/W disabled. This region can be
programmed as disabled, read/write, write only, or read only, providing the capability to shadow these regions
in main memory.
4.2
Extended Memory (ISA)
The ISA Extended Memory region in Figure 4 covers 15 Mbytes ranging from 100000h–FFFFFFh. There are
three programmable ranges that may be mapped to the ISA Extended Memory region of the MC—the Low
Memory Gap range, the Memory Gap Range, and the High memory Gap Range. Memory in these ranges, that
would normally be “l(fā)ost”, is recovered by the MC by extending the effective top of system memory, if reclaiming
is enabled. The Memory Gap Range and High Memory Gap range are also programmable ranges in the PB.
The PB also has a programmable PCI Frame Buffer Range.
Low Memory Gap Range (MC Only)
The Low Memory Gap range can start on any 1 Mbyte boundary in the ISA or EISA Extended Memory region,
and can be 1, 2, 4, 8, 16, or 32 Mbytes. This region defines a “hole” in system DRAM space where accesses
can be directed to the PCI bus. The Low Memory Gap Range is used by ISA devices such as LAN or linear
frame buffers which are mapped into the ISA Extended region, or by any EISA or PCI device. The Low Memory
Gap Range must reside at the lowest address of the three memory gaps, if it is enabled.
PCI Frame Buffer Range (PB Only)
The PCI Frame Buffer range can start on any 1 Mbyte boundary in either the ISA Extended Memory region or
the EISA Extended Memory Region, and can be 1, 2, 4, 8, 16,or 32 Mbytes.
相關(guān)PDF資料
PDF描述
S83296SA 16-BIT, MROM, 40 MHz, MICROCONTROLLER, PQFP100
SB83296SA 16-BIT, MROM, 40 MHz, MICROCONTROLLER, PQFP100
S83C196MH 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP80
S83C51FB-BB44 8-BIT, MROM, 24 MHz, MICROCONTROLLER, PQFP44
S83C51FC-5B44 8-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP44
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
S82452KX 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Data Path Controller
S82453KX 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DRAM Controller
S82454KX 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PCI Bus Interface/Controller
S8248P12NF 功能描述:ANTENNA 824-896MHZ 8DBI N FML RoHS:是 類別:RF/IF 和 RFID >> RF 天線 系列:* 標(biāo)準(zhǔn)包裝:1 系列:*
S82510 DIE 制造商:Intel 功能描述: