參數(shù)資料
型號(hào): P95020NQG8
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 電源管理
英文描述: 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC132
封裝: 10 X 10 MM, 0.85 MM HEIGHT, QFN-132
文件頁數(shù): 86/169頁
文件大?。?/td> 4297K
代理商: P95020NQG8
IDTP95020
Product Datasheet
September 2, 2011 Revision 1.3 Final
23
2011 Integrated Device Technology, Inc.
Figure 6. Stereo Digital Microphone (Mode 1 and 2)
Audio – Analog Line Input
The Analog Line Input path consists of a stereo differential
input analog buffer that is routed to the analog mixer and
ADC0. By using the analog mixer, the analog line input
may be routed to ADC0, the line output port or the
headphone output port.
Audio – DAC, ADC
There are 2 stereo DACs and 2 stereo ADCs. All
converters support sample rates of 8kHz, 11.025khz,
12kHz, 22.050kHz, 16kHz, 24kHz, 44.1kHz, 48kHz,
88.2kHz, and 96kHz. Word lengths of 16, 20 and 24-bits
are selectable.
DAC 0/1
The DAC sample rate and word length are programmed at
the IS input port and the DAC may select either IS port
as the data source.
Digital volume control provides -95.25 dB to 0dB gain in
0.75 dB steps and mute. The output of DAC0 and DAC1
is sent to the analog mixer, the headphone output and the
line output.
ADC 0/1
Each ADC includes a high pass filter to remove DC offsets
present in the input path. Sample rate, word length, and
source ADC are programmed at the IS output port. If an
ADC is selected as the audio data source for more than
one audio data sink (IS output or DAC) then the rates
must be programmed the same at all sinks (see Figure 4
blocks 4 and 5). If the rates are not identical, then the
highest priority sink will dominate (I2S_SDOUT1,
I2S_SDOUT2, DAC0 and DAC1). The other sink will be
muted under these circumstances. ADC0 includes an
analog amplifier (0-22.5dB gain in 1.5dB steps) and a
multiplexer to select between the line input path or the
analog mixer output.
Note: There is only 1 L/R clock per IS I/O port. Therefore,
the input and output rates for that port match.
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