參數(shù)資料
型號(hào)： P95020NQG8
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： 電源管理
英文描述： 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC132
封裝： 10 X 10 MM, 0.85 MM HEIGHT, QFN-132
文件頁數(shù)： 116/169頁
文件大?。?/td> 4297K
代理商： P95020NQG8
IDTP95020
Product Datasheet
September 2, 2011 Revision 1.3 Final
50
2011 Integrated Device Technology, Inc.
AGC5_MISC: IC Address = Page-1: 192(0xC0), C Address = 0xA1C0
Table 74. AGC5 Automatic Gain Control Register
BIT
BIT NAME
DEFAULT SETTING USER TYPE VALUE
DESCRIPTION / COMMENTS
0
FASTEST_ATTACK_DIS 0b
RW
0 = Not Disabled
1 = Disabled
Disable fastest attack when >85% peak
[7:1] RESERVED
0000000b
RW
RESERVED
DAC0/1 Control Register Set
DAC_CTRL: IC Address = Page-1: 193(0xC1), C Address = 0xA1C1
Table 75. DAC0/1 Control Register
BIT
BIT NAME
DEFAULT SETTING USER TYPE VALUE DESCRIPTION / COMMENTS
[7:0] RESERVED 00h
RW
RESERVED
Source Control for Output Converters Registers
There are 4 output converters available: I2S_SDOUT1,
I2S_SDOUT2, DAC0 and DAC1. Each may select one of
the 4 available digital data sources: I2S_SDIN1,
I2S_SDIN2, ADC0 or ADC1.
The output converters
assume the characteristics of the selected source. There
is no rate translation. If IS port 1 is routed to IS port 2
then the rates of both ports must be the same. If the rates
are not the same, then the output from the sink port will be
forced to 0 and will retain the rate programmed for that
port. If data widths are not the same, the data will be
truncated or zero-padded as necessary. If an ADC is
chosen as the source for an IS output then the IS output
characteristics will be used to set the ADC rate and data
width. If an ADC is connected to both I2S_SDOUT1 and
I2S_SDOUT2, the characteristics of I2S_SDOUT1 will be
used. If a DAC is connected to an ADC and the ADC is
not connected to an IS port, the ADC and DAC will
default to 48 kHz/24-bit.
I2S1_SOURCE: IC Address = Page-1: 194(0xC2), C Address = 0xA1C2
Table 76. I2S1 Source Control Register
BIT
BIT NAME
DEFAULT SETTING USER TYPE VALUE
DESCRIPTION / COMMENTS
[1:0] I2S1_SOURCE_SEL 00b
RW
00b = I2S_SDIN1
01b = I2S_SDIN2
10b = ADC0
11b = ADC1
I2S1 source select
[7:2] RESERVED
000000b
RW
RESERVED
I2S2_SOURCE: IC Address = Page-1: 195(0xC3), C Address = 0xA1C3
Table 77. I2S2 Source Control Register
BIT
BIT NAME
DEFAULT SETTING USER TYPE VALUE
DESCRIPTION / COMMENTS
[1:0] I2S2_SOURCE_SEL 00b
RW
00b = I2S_SDIN1
01b = I2S_SDIN2
10b = ADC0
11b = ADC1
I2S2 source select
[7:2] RESERVED
000000b
RW
RESERVED
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