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參數(shù)資料
| 型號(hào)： | P95020NQG8 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 電源管理 |
| 英文描述： | 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC132 |
| 封裝： | 10 X 10 MM, 0.85 MM HEIGHT, QFN-132 |
| 文件頁(yè)數(shù)： | 134/169頁(yè) |
| 文件大小： | 4297K |
| 代理商： | P95020NQG8 |
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IDTP95020
Product Datasheet
September 2, 2011 Revision 1.3 Final
67
2011 Integrated Device Technology, Inc.
Charger – Pre-Regulator
The Pre-Regulator is a buck converter which has input
current limit up to 2A. The Pre-Regulator monitors the
external input voltage and, when the voltage level is above
the UVLO level, it regulates VSYS to 3.6V or (VBAT+0.3V)
whichever is greater. The Pre-Regulator will stop running
if the input voltage is below the UVLO level.
This Pre-Regulator will generate a status of the input (VBUS)
power so the system can be made aware of the type of
power source and adjust operating parameters
accordingly.
The average input current is monitored and limited by the
current limit settings. A resistor (600Ω) from CLSEN to
ground determines the upper limit of the current supplied
from the VBUS pin. A fraction of the VBUS current is provided
to the CLSEN pin when the synchronous switch of the
Pre-Regulator is on. Several VBUS current limit settings are
available via input pin or current limit configuration
registers. If INT_ILIM (bit7) of current limit configuration
register (0xA090) is 1, the current limit is defined by
I_ILIM[2:0]. If INT_ILIM is 0, the current limit is defined by
the GPIO4/CHRG_ILIM pin. Low sets a 500mA current
limit while high sets a 1.5A current limit (Table 92). The
default setting is 100mA during VSYS start up. When VSYS
reaches its final value, the current limit value is obtained
from the internal register setting, which can be a default
setting (power up) or dynamic setting (after the external
application processor programs it).
VSYS drives both the system load and the battery charger.
If the combined load does not cause the switching
regulator to exceed the programmed input current limit,
VSYS will track approximately 0.3V above the battery. By
keeping the voltage across the battery charger low,
efficiency is optimized because power lost to the linear
battery charger is minimized. Power available to the
external system load is therefore optimized.
If the combined system load at VSYS is large enough to
cause the switching power supply to reach the
programmed input current limit, VSYS will drop. Depending
on the configuration, the battery charger will reduce its
charge current when the VSYS drops below 3.6V to enable
the external load to be satisfied.
If the voltage at VBAT is below 3.3V and the load
requirement does not cause the switching regulator to
exceed the programmed input current limit, Vwill
regulate at 3.6V. If the load exceeds the available power,
VSYS will drop to a voltage between 3.6V and the battery
voltage. Figure 14 shows the range of possible voltages at
VSYS as function of battery voltage.
For very low battery voltage, due to limited input power,
charging current will tend to pull VSYS below the 3.6V
“instant-on” voltage. If instant-on operation under low
battery conditions is a requirement then DIS_INST_ON of
the Charger Special Control Register (0xA094) should be
set to 0, so that an under voltage circuit will automatically
detect that VSYS is falling below 3.6V and disable the
battery charging. If maximum charge current at low battery
voltage is preferred, the instant-on function should be
disabled by setting DIS_INST_ON to 1. If the load
exceeds the current limit at VBUS and the system is not in
the instant-on mode, the battery charger will reduce
charge current when the under voltage circuit detects VSYS
is falling below 3.6V.
Figure 14. VSYS Regulation Curve (Tracking VBAT )
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