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參數(shù)資料
| 型號： | P95020NQG8 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 電源管理 |
| 英文描述： | 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC132 |
| 封裝： | 10 X 10 MM, 0.85 MM HEIGHT, QFN-132 |
| 文件頁數(shù)： | 51/169頁 |
| 文件大?。?/td> | 4297K |
| 代理商： | P95020NQG8 |
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IDTP95020
Product Datasheet
September 2, 2011 Revision 1.3 Final
144
2011 Integrated Device Technology, Inc.
Interrupt Dispatcher
The interrupt dispatcher on the IDTP95020 directs
interrupts to the internal or external processor according to
the INT_DIR configuration stored in the ACCM Register.
Please note that the configuration register is in the same
address space of other functional modules and hence can
be accessed by the internal and external processor.
Interrupts mapped to the internal processor are merged
and dispatched to the embedded microcontroller.
Interrupts mapped to the external processor are merged
and dispatched to the external pin (INT_OUT). To ease
the interrupt indexing of the external processor, two
interrupt index registers (one for internal and the other for
external) are defined to reflect the status of different types
of interrupt status bits. Please note that the index register
is just reflects the interrupt status of the various modules
and there are no real registers implemented. Therefore,
clearing a particular interrupt status must be performed in
the module which generated the interrupt.
Access Arbiter
Access request from an IC slave and embedded
processor will be arbitrated with strict high priority to IC.
The access is split to byte-per-byte basis.
Digital Audio Data Serial Interface
Audio data is transferred between the host processor and
the IDTP95020 via the digital audio data serial interface,
or audio bus. The audio bus on this device is flexible,
including left or right justified data options, support for IS
protocols, programmable data length options.
The audio bus of IDTP95020 can be configured for left or
right justified, IS slave modes of operation. These modes
are all MSB-first, with data width programmable as 16, 20,
24 bits.
The world clock (I2S_WS1 or I2S_WS2) is used to define
the beginning of a frame. The frequency of this clock
corresponds to the maximum of the selected ADC and
DAC sampling frequency. The bit clock (I2S_BCLK1 or
I2S_BCLK2) is used to clock in and out the digital audio
data across the serial bus. Each port may be programmed
for 8 kHz, 11.025 kHz, 12 kHz, 16 kHz, 22.050 kHz, 24
kHz, 44.1 kHz, 48 kHz, 88.2 kHz or 96 kHz sample rate.
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PDF描述 |
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| P95020ZNQGI8 | 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC132 |
| P95020ZLLG | 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, PBGA124 |
| P95020ZLLGI | 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, PBGA124 |
| P95020ZNQGI | 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC132 |
| P95020ZNQG | 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC132 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| P95020ZDLLG | 制造商:Integrated Device Technology Inc 功能描述:124-LGA - Bulk |
| P95020ZDLLG8 | 制造商:Integrated Device Technology Inc 功能描述:124-LGA - Tape and Reel |
| P95020ZDNQG | 制造商:Integrated Device Technology Inc 功能描述:132-VFQFPN - Bulk |
| P95020ZDNQG8 | 制造商:Integrated Device Technology Inc 功能描述:132-VFQFPN - Tape and Reel |
| P95021NQG | 功能描述:PMIC 解決方案 Integrates Audio, LED B/Light Pwr Mgt RoHS:否 制造商:Texas Instruments 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-24 封裝:Reel |
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