參數資料
型號： P95020NQG8
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： 電源管理
英文描述： 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC132
封裝： 10 X 10 MM, 0.85 MM HEIGHT, QFN-132
文件頁數： 160/169頁
文件大?。?/td> 4297K
代理商： P95020NQG8
IDTP95020
Product Datasheet
September 2, 2011 Revision 1.3 Final
90
2011 Integrated Device Technology, Inc.
Buck Regulators – Pin Definitions
DIAGRAM ID PIN # BUCK500_0
PIN # BUCK500_1
PIN # BUCK1000
FEEDBACK
A49
BC0_ FDBK
A47
BC1_FDBK
A45
BC2_FDBK
GND
B42
BC0_GND
B40
BC1_GND
B39
BC2_GND
OUT
A50
BC0_OUT
A48
BC1_OUT
A46
BC2_OUT
VIN
B43
BC0_IN
B41
BC1_IN
B38
BC2_IN
Buck Regulators – Electrical Characteristics
Unless otherwise specified, typical values at TA = 25°C, VIN = VSYS = 3.8V, TA = 0°C to +70°C (VIN must be connected to
VSYS).
SYMBOL
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
VIN
Operating Input Voltage Range
VIN = VSYS
3.0
5.25
V
VOUT
Programmable Output Voltage Range
[Note 2]
0.75
3.70
V
ΔVOUT
Output Voltage Step Size
25
mV
ΦOVERALL
Overall Output Voltage Accuracy
VIN = 3.0V to 4.5V,
IOUT = 0 to Imax,
[Note 1], [Note 3]
-3
+3
%
IOUT-PFM
Maximum Output Current in PFM Mode, (BUCK500)
Maximum Output Current in PFM Mode, (BUCK1000)
VIN = 3.0V to 4.5V,
[Note 1], [Note 3]
100
200
mA
IOUT-PWM
Maximum Output Current in PWM Mode, (BUCK500)
Maximum Output Current in PWM Mode, (BUCK1000)
VIN = 3.0V to 4.5V,
[Note 1], [Note 3]
500
1000
mA
ICLP
Full Scale Cycle by Cycle Current Limit (BUCK500)
Full Scale Cycle by Cycle Current Limit (BUCK1000)
0xA081 [3:2], 0xA083 [3:2],
0xA085 [3:2] both bits set to 1
650
1200
1050
1800
mAPK
ΔICLP
Cycle by Cycle Current Limit Step Size
4 preset levels
25
%
ISCP
Switch Peak Short Circuit Current (BUCK500)
Switch Peak Short Circuit Current (BUCK1000)
ISCP is a secondary current
protection to prevent over
current runaway.
1.3
2.25
APK
RDS-ON-HS
High Side Switch On Resistance (BUCK500)
High Side Switch On Resistance (BUCK1000)
ISW = -50mA
0.5
0.25
Ω
RDS-ON-LS
Low Side Switch On Resistance (BUCK500)
Low Side Switch On Resistance (BUCK1000)
ISW = 50mA
0.5
0.25
Ω
fPWML
PWM Mode Clock Frequency (Low)
[Note 1], [Note 4], See
Table
151
1
MHz
fPWMH
PWM Mode Clock Frequency (High)
[Note 1], [Note 4], See
Table
151.
2
MHz
DMAX
PWM Mode Max Duty Cycle
100
%
tON(MIN)
Minimum Output On Time
75
ns
tSFTSLEW
Soft Start Output Slew Rate
12.5
mV/s
IQS
IQPFM
IQPWM
Quiescent Operating Current
Not operating – Shutdown Mode
Operating (No Load) PFM Mode
Operating (No Load) PWM Mode
[Note 1], See
Table 150
1
60
3.5
A
mA
ILEAKSW
Leakage Current Into SW pin,
Shutdown Mode, VSW=4.5V,
DCDC_GLOBAL_EN (0x05)=0;
1
A
ILEAKVIN
Leakage Current Into VIN pin
Shutdown Mode, VIN = 4.5V,
VSW=0V
DCDC_GLOBAL_EN (0x05) = 0;
1
A
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