參數(shù)資料
型號： P95020NQG8
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： 電源管理
英文描述： 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC132
封裝： 10 X 10 MM, 0.85 MM HEIGHT, QFN-132
文件頁數(shù)： 65/169頁
文件大?。?/td> 4297K
代理商： P95020NQG8
IDTP95020
Product Datasheet
September 2, 2011 Revision 1.3 Final
157
2011 Integrated Device Technology, Inc.
LDO – Register Settings
The LDO Module can be controlled and monitored by writing 8-bit control words to the various registers. The base addresses
are defined in Table 11 – Register Address Global Mapping on Page 16.
LDO_150 and LDO_050 Operation Registers
The Output Voltage Registers for the LDO_150 and LDO_050 LDOs contain the enable bit and setting bits for the output
voltage.
LDO_150_0 = IC Address = Page-0: 96(0x60), C Address = 0xA060
LDO_150_1 = IC Address = Page-0: 98(0x62), C Address = 0xA062
LDO_150_2 = IC Address = Page-0: 100(0x64), C Address = 0xA064
LDO_050_0 = IC Address = Page-0: 102(0x66), C Address = 0xA066
LDO_050_1 = IC Address = Page-0: 104(0x68), C Address = 0xA068
LDO_050_2 = IC Address = Page-0: 106(0x6A), C Address = 0xA06A
LDO_050_3 = IC Address = Page-0: 108(0x6C), C Address = 0xA06C
Table 261. LDO_150 and LDO_050 Operation Registers
BIT
NAME
DEFAULT
SETTING
USER
TYPE
VALUE
DESCRIPTION / COMMENTS
[6:0] VOUT
(See Note)
RW
Output Voltage = VOUT * 25
mV + 750 mV
Performance and accuracy are not guaranteed with bit
combinations above 1110110.
7
ENABLE
0b
RW
1 = Enable
0 = Disable
LDO local enable bit for the LDO_150 and LDO_050 LDOs
Reserved bit for LDO_050_0
Note: The VOUT default setting for LDO_050_0 is 1.8V, the VOUT default setting for the other LDO is 1.2V.
LDO_150 and LDO_050 Control Registers
The Control Registers contains bits for setting the Current Limit.
LDO_150_0 = IC Address = Page-0: 97(0x61), C Address = 0xA061
LDO_150_1 = IC Address = Page-0: 99(0x63), C Address = 0xA063
LDO_150_2 = IC Address = Page-0: 101(0x65), C Address = 0xA065
LDO_050_0 = IC Address = Page-0: 103(0x67), C Address = 0xA067
LDO_050_1 = IC Address = Page-0: 105(0x69), C Address = 0xA069
LDO_050_2 = IC Address = Page-0: 107(0x6B), C Address = 0xA06B
LDO_050_3 = IC Address = Page-0: 109(0x6D), C Address = 0xA06D
Table 262. LDO_150 and LDO_050 Control Registers
BIT
BIT NAME
DEFAULT
SETTING
USER
TYPE
VALUE
DESCRIPTION / COMMENTS
[1:0] I_LIM
00b
RW
(See
Table 263)
Current Limit (%)
[7:2] RESERVED 000000b
RW
RESERVED
Table 263. Control Register Current Limit (I_LIM) Settings for Bits [1:0]
BIT 3 BIT 2 DESCRIPTION
0
Current Limit = 120 % of Rating
0
1
Current Limit = 90 % of Rating
1
0
Current Limit = 60 % of Rating
1
Current Limit = 30 % of Rating
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