參數(shù)資料
型號： ISP1761BE
廠商： NXP SEMICONDUCTORS
元件分類： 總線控制器
英文描述： Hi-Speed Universal Serial Bus On-The-Go controller
中文描述： UNIVERSAL SERIAL BUS CONTROLLER, PQFP128
封裝： 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT425-1, LQFP-128
文件頁數(shù)： 94/158頁
文件大小： 724K
代理商： ISP1761BE
9397 750 13258
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 12 January 2005
94 of 158
Philips Semiconductors
ISP1761
Hi-Speed USB OTG controller
9.5.3.2
OTG Interrupt Latch register (S/C: 037Ch/037Eh)
The OTG Interrupt Latch register indicates the source that generated the interrupt. The
status of this register bits depends on the settings of the Interrupt Enable Fall and
Interrupt Enable Rise registers, and the occurrence of the respective events.
The bit allocation of the register is given in
Table 84
.
[1]
The reserved bits should always be written with the reset value.
7
6 to 5
4
3
2
1
0
B_SESS_END
-
RMT_CONN
ID
DP_SRP
A_B_SESS_VLD
VBUS_VLD
V
BUS
< 0.8 V
reserved
Remote connect detection
ID pin digital input
DP asserted during SRP
A session valid for the A-device. B session valid for the B-device.
A-device V
BUS
valid comparator, indicates V
BUS
> 4.4 V
Table 83:
Bit
OTG Status register: bit description
…continued
Symbol
Description
Table 84:
Bit
Symbol
OTG Interrupt Latch register: bit allocation
15
14
13
12
11
10
9
8
reserved
[1]
OTG_
SUSPEND
0
R
2
DP_SRP
OTG_TMR
_TIMEOUT
0
R/S/C
1
A_B_SESS
_VLD
0
R/S/C
B_SE0_
SRP
0
R/S/C
0
VBUS_VLD
Reset
Access
Bit
Symbol
0
0
0
0
0
R/S/C
7
B_SESS_
END
0
R/S/C
R/S/C
6
BDIS_
ACON
0
R/S/C
R/S/C
5
OTG_
RESUME
0
R/S/C
R/S/C
4
RMT_
CONN
0
R/S/C
R/S/C
3
ID
Reset
Access
0
0
0
R/S/C
R/S/C
R/S/C
Table 85:
Bit
15 to 11
10
9
8
7
6
5
4
3
2
1
OTG Interrupt Latch register: bit description
Symbol
-
OTG_SUSPEND
OTG_TMR_TIMEOUT OTG timer timeout
B_SE0_SRP
B_SESS_END
BDIS_ACON
OTG_RESUME
RMT_CONN
ID
DP_SRP
A_B_SESS_VLD
Description
reserved for future use
Indicates that the bus is idle for > 3 ms
2 ms of SE0 detected in the B-idle state
V
BUS
< 0.8 V
Indicates that the BDIS_ACON event has occurred
J -> K resume change detected
Remote connect detection
Indicates change on pin ID
DP asserted during SRP
A-session valid for the A-device. B session valid for the
B-device.
Indicates change in the VBUS_VLD status
0
VBUS_VLD
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ISP1761BE,551 功能描述:USB 接口集成電路 DO NOT USE ORDER -T OR NO "-" RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1761BE,557 功能描述:USB 接口集成電路 USB HS OTG CTRLR RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
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