參數(shù)資料
型號： ISP1761BE
廠商： NXP SEMICONDUCTORS
元件分類： 總線控制器
英文描述： Hi-Speed Universal Serial Bus On-The-Go controller
中文描述： UNIVERSAL SERIAL BUS CONTROLLER, PQFP128
封裝： 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT425-1, LQFP-128
文件頁數(shù)： 90/158頁
文件大?。?/td> 724K
代理商： ISP1761BE
9397 750 13258
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 12 January 2005
90 of 158
Philips Semiconductors
ISP1761
Hi-Speed USB OTG controller
2. Set the corresponding bits of the OTG Interrupt Enable Rise and OTG Interrupt
Enable Fall registers.
3. Set bit OTG_IRQ_E of the HcInterruptEnable register (bit 10).
4. Set bit GLOBAL_INTR_EN of the HW Mode Control register (bit 0).
When an interrupt is generated on HC_IRQ, perform these steps in the interrupt service
routine to get the related OTG status:
1. Read the HcInterrupt register. If OTG_IRQ (bit 10) is set, then step 2.
2. Read the OTG Interrupt Latch register. If any of the bits 0 to 4 are set, then step 3.
3. Read the OTG Status register.
The OTG state machine routines are called when any of the inputs is changed. These
inputs come from either OTG registers (hardware) or application program (software). The
outputs of the state machine include control signals to the OTG register (for hardware)
and states or error codes (for software).
The ISP1761 can be configured in OTG mode or in pure host or peripheral mode.
Programming the ISP1761 in OTG mode is done by setting bit 10 of the OTG control
register. This will enable OTG-specific mechanisms controlled by the OTG control register
bits.
When the OTG protocol is not implemented by the software, the ISP1761 can be used as
a host or a peripheral. In this case, bit 10 of the OTG control register will be set to logic 0.
The host or peripheral functionality is determined by bit 7 of the OTG Control register.
Programming of the OTG registers is done by a SET and RESET scheme. An OTG
register has two parts: a 16-bit SET and a 16-bit RESET. Writing logic 1 in a certain
position to the SET-type dedicated 16-bit register part will set the respective bit to logic 1
while writing logic 1 to the RESET-type 16-bit dedicated register will change the
corresponding bit to logic 0.
9.5 OTG Controller registers
Table 75:
Address
037Xh—038Xh
OTG Controller-specific register overview
Register
OTG registers
Reset value
-
References
-
Table 76:
Address
Device ID registers
0370h
OTG Control register
0374h
OTG Interrupt registers
0378h
037Ch
0380h
0384h
Address mapping of registers: 32-bit data bus mode
Byte 3
Byte 2
Byte 1
Byte 0
Product ID (read only)
Vendor ID (read only)
OTG Control (clear)
OTG Control (set)
reserved
OTG Interrupt Latch (clear)
OTG Interrupt Enable Fall (clear)
OTG Interrupt Enable Rise (clear)
OTG Status (read only)
OTG Interrupt Latch (set)
OTG Interrupt Enable Fall (set)
OTG Interrupt Enable Rise (set)
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ISP1761BE,518 功能描述:USB 接口集成電路 USB HS OTG CONTROLLER RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1761BE,551 功能描述:USB 接口集成電路 DO NOT USE ORDER -T OR NO "-" RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1761BE,557 功能描述:USB 接口集成電路 USB HS OTG CTRLR RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1761BE518 制造商:ST-Ericsson 功能描述:IC CONTROLLER USB OTG 128LQFP
ISP1761BEGE 功能描述:IC USB CTRL HI-SPEED 128LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A
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