參數(shù)資料
型號: ISP1761BE
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: Hi-Speed Universal Serial Bus On-The-Go controller
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP128
封裝: 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT425-1, LQFP-128
文件頁數(shù): 103/158頁
文件大?。?/td> 724K
代理商: ISP1761BE
9397 750 13258
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 12 January 2005
103 of 158
Philips Semiconductors
ISP1761
Hi-Speed USB OTG controller
In response to the standard USB request SET_ADDRESS, the firmware must write the
(enabled) peripheral address to the Address register, followed by sending an empty
packet to the host. The
new
peripheral address is activated when the peripheral receives
acknowledgment from the host.
10.4.2
Mode register (R/W: 020Ch)
This register consists of 2 B (bit allocation: see
Table 96
).
The Mode register controls resume, suspend and wake-up behavior, interrupt activity, soft
reset and clock signals.
[1]
The reserved bits should always be written with the reset value.
Table 94:
Bit
Symbol
Reset
Bus reset
Access
Address register: bit allocation
7
DEVEN
0
1
R/W
6
5
4
3
2
1
0
DEVADDR[6:0]
0
0
R/W
0
0
0
0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
Table 95:
Bit
7
6 to 0
Address register: bit description
Symbol
DEVEN
DEVADDR[6:0]
Description
Device Enable
: Logic 1 enables the peripheral.
Device Address
: This field specifies the USB device peripheral.
Table 96:
Bit
Symbol
Mode register: bit allocation
15
14
13
12
11
10
9
8
reserved
[1]
DMACLK
ON
0
0
R/W
1
VBUSSTAT
Reset
Bus reset
Access
Bit
Symbol
Reset
Bus reset
Access
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
7
R/W
6
R/W
5
R/W
4
R/W
3
R/W
2
R/W
0
CLKAON
0
0
R/W
SNDRSU
0
0
R/W
GOSUSP
0
0
R/W
SFRESET
0
0
R/W
GLINTENA
0
unchanged
R/W
WKUPCS
0
0
R/W
reserved
[1]
0
0
0
unchanged
R/W
R/W
Table 97:
Bit
15 to 10
9
Mode register: bit description
Symbol
Description
-
reserved
DMACLKON
DMA Clock On
:
1 —
Supply clock to the DMA circuit
0 —
Power saving mode. The DMA circuit will stop completely to save
power.
VBUSSTAT
V
BUS
Status
: This bit reflects the V
BUS
pin status.
8
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