參數(shù)資料
型號： ISP1761BE
廠商： NXP SEMICONDUCTORS
元件分類： 總線控制器
英文描述： Hi-Speed Universal Serial Bus On-The-Go controller
中文描述： UNIVERSAL SERIAL BUS CONTROLLER, PQFP128
封裝： 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT425-1, LQFP-128
文件頁數(shù)： 43/158頁
文件大?。?/td> 724K
代理商： ISP1761BE
9397 750 13258
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 12 January 2005
43 of 158
Philips Semiconductors
ISP1761
Hi-Speed USB OTG controller
[1]
The reserved bits should always be written with the reset value.
Table 34:
Bit
Symbol
HW Mode Control register: bit allocation
31
30
ALL_ATX_
RESET
0
R/W
R/W
23
22
29
28
27
26
25
24
reserved
[1]
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
0
0
0
0
0
0
0
R/W
21
R/W
20
R/W
19
R/W
18
R/W
17
R/W
16
reserved
[1]
0
0
0
0
0
0
0
0
R/W
15
R/W
14
R/W
13
R/W
12
R/W
11
DEV_
DMA
0
R/W
3
R/W
10
COMN_
IRQ
0
R/W
2
INTR_POL
R/W
9
COMN_
DMA
0
R/W
1
INTR_
LEVEL
0
R/W
R/W
8
ANA_DIGI
_OC
0
R/W
7
reserved
reserved
[1]
DATA_BUS
_WIDTH
1
R/W
0
GLOBAL_
INTR_EN
0
R/W
Reset
Access
Bit
Symbol
0
0
0
R/W
6
DACK_
POL
0
R/W
R/W
5
DREQ_
POL
0
R/W
R/W
4
reserved
[1]
Reset
Access
0
0
0
0
R/W
R/W
R/W
R/W
Table 35:
Bit
31
HW Mode Control register: bit description
Symbol
Description
ALL_ATX_
RESET
1 —
Enable reset, then write back logic 0
0 —
No reset.
30 to 16 -
reserved; write logic 0
15
ANA_DIGI_OC
Analog Digital Overcurrent
: This bit selects analog or digital
overcurrent detection on pins OC1_N/V
BUS
, OC2_N and OC3_N.
0 —
Digital overcurrent
1 —
Analog overcurrent.
14 to 12 -
reserved; write logic 0
11
DEV_DMA
Device DMA
: When this bit and bit 9 are set, DC_DREQ and
DC_DACK peripheral signals are selected on the HC_DREQ and
HC_DACK pins
10
COMN_INT
Common IRQ
: When this bit is set, DC_IRQ will be generated on the
HC_IRQ pin.
9
COMN_DMA
Common DMA
: When this bit and bit 11 are set, the DC_DREQ and
DC_DACK peripheral signals are routed to the HC_DREQ and
HC_DACK pins.
8
DATA_BUS_
WIDTH
0 —
defines a 16-bit data bus width
1 —
sets a 32-bit data bus width.
Remark:
Setting this bit will affect all the controllers on the chip (Host
Controller, Peripheral Controller and OTG Controller).
All ATX Reset
: For debugging purposes (not used normally).
Data Bus Width
:
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