參數(shù)資料
型號(hào): ISP1761BE
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: Hi-Speed Universal Serial Bus On-The-Go controller
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP128
封裝: 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT425-1, LQFP-128
文件頁數(shù): 32/158頁
文件大?。?/td> 724K
代理商: ISP1761BE
9397 750 13258
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 12 January 2005
32 of 158
Philips Semiconductors
ISP1761
Hi-Speed USB OTG controller
8.1 EHCI capability registers
8.1.1
CAPLENGTH register (R: 0000h)
The bit description of the Capability Length (CAPLENGTH) register is given in
Table 9
.
8.1.2
HCIVERSION register (R: 0002h)
Table 10
shows the bit description of the Host Controller Interface Version Number
(HCIVERSION) register.
8.1.3
HCSPARAMS register (R: 0004h)
The Host Controller Structural Parameters (HCSPARAMS) register is a set of fields that
are structural parameters. The bit allocation is given in
Table 11
.
0338h
033Ch
0340h
0344h
0354h
Interrupt registers
0310h
0314h
0318h
031Ch
0320h
0324h
0328h
032Ch
ATL Done Timeout
Memory
Edge Interrupt Count
DMA Start address
Power Down Control
0000 0000h
0000 0000h
0000 000Fh
0000 0000h
03E8 1BA0h
Section 8.3.7 on page 47
Section 8.3.8 on page 47
Section 8.3.9 on page 48
Section 8.3.10 on page 49
Section 8.3.11 on page 50
HcInterrupt
HcInterruptEnable
ISO IRQ Mask OR
INT IRQ Mask OR
ATL IRQ Mask OR
ISO IRQ Mask AND
INT IRQ Mask AND
ATL IRQ Mask AND
0000 0000h
0000 0000h
0000 0000h
0000 0000h
0000 0000h
0000 0000h
0000 0000h
0000 0000h
Section 8.4.1 on page 52
Section 8.4.2 on page 54
Section 8.4.3 on page 56
Section 8.4.4 on page 56
Section 8.4.5 on page 56
Section 8.4.6 on page 56
Section 8.4.7 on page 57
Section 8.4.8 on page 57
Table 8:
Address
Host Controller-specific register overview
…continued
Register
Reset value
References
Table 9:
Bit
7 to 0
CAPLENGTH register: bit description
Symbol
Access
CAPLENGTH
[7:0]
Value
20h
Description
Capability Length
: This is used as an offset. It
is added to the register base to find the
beginning of the operational register space.
R
Table 10:
Bit
15 to 0 HCIVERSION[15:0]
HCIVERSION register: bit description
Symbol
Access
R
Value
0100h
Description
Host Controller Interface Version Number
:
It contains a BCD encoding of the version
number of the interface to which the Host
Controller interface conforms.
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