參數(shù)資料
型號: ISP1761BE
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: Hi-Speed Universal Serial Bus On-The-Go controller
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP128
封裝: 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT425-1, LQFP-128
文件頁數(shù): 29/158頁
文件大?。?/td> 724K
代理商: ISP1761BE
9397 750 13258
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 12 January 2005
29 of 158
Philips Semiconductors
ISP1761
Hi-Speed USB OTG controller
7.8 Overcurrent detection
The ISP1761 can implement a digital or analog overcurrent detection scheme. Bit 15 of
the HW Mode Control register can be programmed to select the analog or digital
overcurrent detection. An analog overcurrent detection circuit is integrated on-chip. The
main features of this circuit are self reporting, automatic resetting, low-trip time and low
cost. This circuit offers an easy solution at no extra hardware cost on the board. The port
power will be automatically disabled by the ISP1761 on an overcurrent event occurrence,
by deasserting the PSWn_N signal without any software intervention.
When using the integrated analog overcurrent detection, the range of the overcurrent
detection voltage for the ISP1761 is 45 mV to 90 mV. Calculation of the external
components should be based on the 45 mV value, with the actual overcurrent detection
threshold usually positioned in the middle of the interval.
For an overcurrent limit of 500 mA per port, a PMOS transistor with R
DSON
of
approximately 100 m
is required. If a PMOS transistor with a lower R
DSON
is used, the
analog overcurrent detection can be adjusted using a series resistor; see
Figure 10
.
V
PMOS
=
V
OC(TRIP)
=
V
TRIP(intrinsic)
(I
OC(nom)
×
R
td
), where:
V
PMOS
= voltage drop on PMOS
I
OC(nom)
= 1
μ
A.
The digital overcurrent scheme requires using an external power switch with integrated
overcurrent detection, such as: LM3526, MIC2526 (2 ports) or LM3544 (4 ports). These
devices are controlled by PSWn_N signals corresponding to each port. In the case of
overcurrent occurrence, these devices will assert OCn_N signals. On OCn_N assertion,
the ISP1761 cuts off the port power by deasserting PSWn_N. The external integrated
power switch will also automatically cut-off the port power in the case of an overcurrent
event, by implementing a thermal shutdown. An internal delay filter of 1 ms to 3 ms will
prevent false overcurrent reporting because of in-rush currents when plugging a USB
device.
(1) R
td
is optional.
Fig 10. Adjusting analog overcurrent detection limit (optional)
004aaa662
REF5V
R
td(1)
5 V
ISP1761
OCn_N
PSWn_N
I
OC
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