參數(shù)資料
型號(hào): ISP1761BE
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: Hi-Speed Universal Serial Bus On-The-Go controller
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP128
封裝: 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT425-1, LQFP-128
文件頁數(shù): 69/158頁
文件大小: 724K
代理商: ISP1761BE
9397 750 13258
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 12 January 2005
69 of 158
Philips Semiconductors
ISP1761
Hi-Speed USB OTG controller
Table 68:
Bit
DW7
63 to 52
High-speed interrupt IN and OUT, QHP: bit description
Symbol
Access
Description
INT_IN_7[[11:0]
HW —
writes
Bytes received during
μ
SOF7, if
μ
SA[7] is set to 1 and frame number is
correct.
Bytes received during
μ
SOF6, if
μ
SA[6] is set to 1 and frame number is
correct.
Bytes received during
μ
SOF5 (bits 7 to 0), if
μ
SA[5] is set to 1 and frame
number is correct.
51 to 40
INT_IN_6[11:0]
HW —
writes
39 to 32
INT_IN_5[7:0]
HW —
writes
DW6
31 to 28
INT_IN_5[3:0]
HW —
writes
Bytes received during
μ
SOF5 (bits 3 to 0), if
μ
SA[5] is set to 1 and frame
number is correct.
Bytes received during
μ
SOF4, if
μ
SA[4] is set to 1 and frame number is
correct.
Bytes received during
μ
SOF3, if
μ
SA[3] is set to 1 and frame number is
correct.
Bytes received during
μ
SOF2 (bits 11 to 8), if
μ
SA[2] is set to 1 and frame
number is correct.
27 to 16
INT_IN_4[11:0]
HW —
writes
15 to 4
INT_IN_3[11:0]
HW —
writes
3 to 0
INT_IN_2[3:0]
HW —
writes
DW5
63 to 56
INT_IN_2[7:0]
HW —
writes
Bytes received during
μ
SOF2 (bits 7 to 0), if
μ
SA[2] is set to 1 and frame
number is correct.
Bytes received during
μ
SOF1, if
μ
SA[1] is set to 1 and frame number is
correct.
Bytes received during
μ
SOF0, if
μ
SA[0] is set to 1 and frame number is
correct.
INT OUT or IN
INT IN or OUT status of
μ
SOF7
INT IN or OUT status of
μ
SOF6
INT IN or OUT status of
μ
SOF5
INT IN or OUT status of
μ
SOF4
INT IN or OUT status of
μ
SOF3
INT IN or OUT status of
μ
SOF2
INT IN or OUT status of
μ
SOF1
Status of the payload on the USB bus for this
μ
SOF after INT has been
delivered.
Bit 0 —
Transaction Error (IN and OUT)
Bit 1 —
Babble (IN token only)
Bit 2 —
underrun (OUT token only).
When the frame number of bits DW2[7:3] match the frame number of the
USB bus, these bits are checked for 1 before they are sent for
μ
SOF. For
example: When
μ
SA[7:0] = 1, 1, 1, 1, 1, 1, 1, 1: send INT for every
μ
SOF of
the entire ms. When
μ
SA[7:0] = 0, 1, 0, 1, 0, 1, 0, 1: send INT for
μ
SOF0,
μ
SOF2,
μ
SOF4 and
μ
SOF6. When
μ
SA[7:0] = 1, 0, 0, 0, 1, 0, 0, 0 = send
INT for every fourth
μ
SOF.
55 to 44
INT_IN_1[11:0]
HW —
writes
43 to 32
INT_IN_0[11:0]
HW —
writes
DW4
31 to 29
28 to 26
25 to 23
22 to 20
19 to 17
16 to 14
13 to 11
10 to 8
Status7[2:0]
Status6[2:0]
Status5[2:0]
Status4[2:0]
Status3[2:0]
Status2[2:0]
Status1[2:0]
Status0[2:0]
HW —
writes
HW —
writes
HW —
writes
HW —
writes
HW —
writes
HW —
writes
HW —
writes
HW —
writes
7 to 0
μ
SA[7:0]
SW —
writes
(0 => 1)
HW —
writes
(1 => 0)
After processing
DW3
63
A
HW —
writes
SW —
writes
Active
: Write the same value as that in V.
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