
IBM3206K0424
IBM Processor for Network Resources
Preliminary
Processor Core (PCORE)
Page 458 of 676
pnr25.chapt05.01
August 14, 2000
17.2: Machine State Register (MSR)
Controls the run time state of the Cobra Core.
Length
32 bits
Type
Read/Write
Address
Accessible via the mtmsr/mfmsr instructions
Power on Reset value
X
’
00 00 00 40
’
Restrictions
None
R
6
R
R
6
6
I
R
R
6
6
R
6
6
6
6
R
4
4
Reserved
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
Bit(s)
Name
Description
31
Reserved
Unimplemented (603/401 LE). Cobra Core doesn
’
t support Little Endian execution.
30
603 RI
Recoverable Interrupt. This bit is cleared when an exception is taken.
29
Reserved
Reserved
28
Reserved
Reserved
27
603 DR
Translation is not supported. Do not set this bit.
26
603 IR
Translation is not supported. Do not set this bit.
25
IP
In combination with HID0(IPO = 26), this bit determines the upper 16 bits of an excep-
tion vector. See
Hardware Implementation Detail 0 Register (HID0)
on page 456 for full
details.
24
Reserved
Reserved
23
Reserved
Unimplemented (603 FE1). Cobra Core doesn
’
t support floating point.
22
603 BE / 401 DE
If HID0(25) = 0 this is 603 BE otherwise it is 401 DE.
21
603 SE
If HID0(25) = 0 this is 603 SE otherwise it is a read/write bit with no affect.
20
Reserved
Unimplemented (603 FE0). Cobra Core doesn
’
t support floating point.
19
603/401 ME
Enables Machine Check Exceptions. If this bit is
’
1
’
, a machine check will cause a
machine check exception to occur. If this bit is
’
0
’
, a machine check will cause Cobra
Core to halt execution (if HID0(0) = 1), or the machine check will be ignored (if HID0(0)
= 0).
18
603/401 FP
If FP=0, all floating point instructions cause a floating point disabled interrupts. If FP=1,
all floating point instructions cause illegal instruction interrupts.
17
603/401 PR
Privilege Instruction Restricted. If this bit is
’
1
’
, attempting to execute a privileged
(supervisor) instruction will result in a privilege violation exception. If this bit is
’
0
’
, all
instructions may be executed normally.
16
603/401 EE
External Interrupt Enable. Used to mask off non-critical level exceptions.
15
Reserved
Unimplemented (603 ILE) Cobra Core doesn't support Little Endian execution.